From: Mario Limonciello <mario.limonciello@amd.com>
To: Alex Deucher <alexander.deucher@amd.com>, <linux-kernel@vger.kernel.org>
Cc: Javier Martinez Canillas <javierm@redhat.com>,
Carlos Soriano Sanchez <csoriano@redhat.com>,
<amd-gfx@lists.freedesktop.org>,
<dri-devel@lists.freedesktop.org>,
David Airlie <airlied@gmail.com>,
"Daniel Vetter" <daniel@ffwll.ch>, <christian.koenig@amd.com>,
Lazar Lijo <Lijo.Lazar@amd.com>,
Mario Limonciello <mario.limonciello@amd.com>,
"Pan, Xinhui" <Xinhui.Pan@amd.com>
Subject: [PATCH v6 10/45] drm/amd: Load VCN microcode during early_init
Date: Wed, 4 Jan 2023 21:42:44 -0600 [thread overview]
Message-ID: <20230105034327.1439-11-mario.limonciello@amd.com> (raw)
In-Reply-To: <20230105034327.1439-1-mario.limonciello@amd.com>
Simplifies the code so that all VCN versions will get the firmware
name from `amdgpu_ucode_ip_version_decode` and then use this filename
to load microcode as part of the early_init process.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v5->v6:
* Fix whitespace problem in firmware file names
* Adjust for amdgpu_ucode_release argument change
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 53 +++++++------------------
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 1 +
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 5 ++-
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 5 ++-
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 5 ++-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 5 ++-
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 5 ++-
7 files changed, 31 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
index b37400107a37..0fb9a6d23065 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
@@ -80,10 +80,24 @@ MODULE_FIRMWARE(FIRMWARE_VCN4_0_4);
static void amdgpu_vcn_idle_work_handler(struct work_struct *work);
+int amdgpu_vcn_early_init(struct amdgpu_device *adev)
+{
+ char ucode_prefix[30];
+ char fw_name[40];
+ int r;
+
+ amdgpu_ucode_ip_version_decode(adev, UVD_HWIP, ucode_prefix, sizeof(ucode_prefix));
+ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s.bin", ucode_prefix);
+ r = amdgpu_ucode_request(adev, &adev->vcn.fw, fw_name);
+ if (r)
+ amdgpu_ucode_release(&adev->vcn.fw);
+
+ return r;
+}
+
int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
{
unsigned long bo_size;
- const char *fw_name;
const struct common_firmware_header *hdr;
unsigned char fw_check;
unsigned int fw_shared_size, log_offset;
@@ -99,46 +113,27 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
switch (adev->ip_versions[UVD_HWIP][0]) {
case IP_VERSION(1, 0, 0):
case IP_VERSION(1, 0, 1):
- if (adev->apu_flags & AMD_APU_IS_RAVEN2)
- fw_name = FIRMWARE_RAVEN2;
- else if (adev->apu_flags & AMD_APU_IS_PICASSO)
- fw_name = FIRMWARE_PICASSO;
- else
- fw_name = FIRMWARE_RAVEN;
- break;
case IP_VERSION(2, 5, 0):
- fw_name = FIRMWARE_ARCTURUS;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(2, 2, 0):
- if (adev->apu_flags & AMD_APU_IS_RENOIR)
- fw_name = FIRMWARE_RENOIR;
- else
- fw_name = FIRMWARE_GREEN_SARDINE;
-
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(2, 6, 0):
- fw_name = FIRMWARE_ALDEBARAN;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(2, 0, 0):
- fw_name = FIRMWARE_NAVI10;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(2, 0, 2):
- if (adev->asic_type == CHIP_NAVI12)
- fw_name = FIRMWARE_NAVI12;
- else
- fw_name = FIRMWARE_NAVI14;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
@@ -146,58 +141,46 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
case IP_VERSION(3, 0, 0):
case IP_VERSION(3, 0, 64):
case IP_VERSION(3, 0, 192):
- if (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 0))
- fw_name = FIRMWARE_SIENNA_CICHLID;
- else
- fw_name = FIRMWARE_NAVY_FLOUNDER;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(3, 0, 2):
- fw_name = FIRMWARE_VANGOGH;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(3, 0, 16):
- fw_name = FIRMWARE_DIMGREY_CAVEFISH;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(3, 0, 33):
- fw_name = FIRMWARE_BEIGE_GOBY;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(3, 1, 1):
- fw_name = FIRMWARE_YELLOW_CARP;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(3, 1, 2):
- fw_name = FIRMWARE_VCN_3_1_2;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(4, 0, 0):
- fw_name = FIRMWARE_VCN4_0_0;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(4, 0, 2):
- fw_name = FIRMWARE_VCN4_0_2;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
break;
case IP_VERSION(4, 0, 4):
- fw_name = FIRMWARE_VCN4_0_4;
if ((adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) &&
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG))
adev->vcn.indirect_sram = true;
@@ -206,12 +189,6 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)
return -EINVAL;
}
- r = amdgpu_ucode_request(adev, &adev->vcn.fw, fw_name);
- if (r) {
- amdgpu_ucode_release(&adev->vcn.fw);
- return r;
- }
-
hdr = (const struct common_firmware_header *)adev->vcn.fw->data;
adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index dbb8d68a30c6..d3e2af902907 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -369,6 +369,7 @@ enum vcn_ring_type {
VCN_UNIFIED_RING,
};
+int amdgpu_vcn_early_init(struct amdgpu_device *adev);
int amdgpu_vcn_sw_init(struct amdgpu_device *adev);
int amdgpu_vcn_sw_fini(struct amdgpu_device *adev);
int amdgpu_vcn_suspend(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index f0fbcda76f5e..c305b2cb8490 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -57,11 +57,12 @@ static void vcn_v1_0_idle_work_handler(struct work_struct *work);
static void vcn_v1_0_ring_begin_use(struct amdgpu_ring *ring);
/**
- * vcn_v1_0_early_init - set function pointers
+ * vcn_v1_0_early_init - set function pointers and load microcode
*
* @handle: amdgpu_device pointer
*
* Set ring and irq function pointers
+ * Load microcode from filesystem
*/
static int vcn_v1_0_early_init(void *handle)
{
@@ -75,7 +76,7 @@ static int vcn_v1_0_early_init(void *handle)
jpeg_v1_0_early_init(handle);
- return 0;
+ return amdgpu_vcn_early_init(adev);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 08871bad9994..4b4cd88414e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -62,11 +62,12 @@ static int vcn_v2_0_pause_dpg_mode(struct amdgpu_device *adev,
int inst_idx, struct dpg_pause_state *new_state);
static int vcn_v2_0_start_sriov(struct amdgpu_device *adev);
/**
- * vcn_v2_0_early_init - set function pointers
+ * vcn_v2_0_early_init - set function pointers and load microcode
*
* @handle: amdgpu_device pointer
*
* Set ring and irq function pointers
+ * Load microcode from filesystem
*/
static int vcn_v2_0_early_init(void *handle)
{
@@ -81,7 +82,7 @@ static int vcn_v2_0_early_init(void *handle)
vcn_v2_0_set_enc_ring_funcs(adev);
vcn_v2_0_set_irq_funcs(adev);
- return 0;
+ return amdgpu_vcn_early_init(adev);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
index ec87b00f2e05..b0b0e69c6a94 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
@@ -71,11 +71,12 @@ static int amdgpu_ih_clientid_vcns[] = {
};
/**
- * vcn_v2_5_early_init - set function pointers
+ * vcn_v2_5_early_init - set function pointers and load microcode
*
* @handle: amdgpu_device pointer
*
* Set ring and irq function pointers
+ * Load microcode from filesystem
*/
static int vcn_v2_5_early_init(void *handle)
{
@@ -107,7 +108,7 @@ static int vcn_v2_5_early_init(void *handle)
vcn_v2_5_set_irq_funcs(adev);
vcn_v2_5_set_ras_funcs(adev);
- return 0;
+ return amdgpu_vcn_early_init(adev);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 9c8b5fd99037..bd228512424a 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -78,11 +78,12 @@ static void vcn_v3_0_dec_ring_set_wptr(struct amdgpu_ring *ring);
static void vcn_v3_0_enc_ring_set_wptr(struct amdgpu_ring *ring);
/**
- * vcn_v3_0_early_init - set function pointers
+ * vcn_v3_0_early_init - set function pointers and load microcode
*
* @handle: amdgpu_device pointer
*
* Set ring and irq function pointers
+ * Load microcode from filesystem
*/
static int vcn_v3_0_early_init(void *handle)
{
@@ -109,7 +110,7 @@ static int vcn_v3_0_early_init(void *handle)
vcn_v3_0_set_enc_ring_funcs(adev);
vcn_v3_0_set_irq_funcs(adev);
- return 0;
+ return amdgpu_vcn_early_init(adev);
}
/**
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
index 1e2b22299975..a79b6088374b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
@@ -68,11 +68,12 @@ static void vcn_v4_0_unified_ring_set_wptr(struct amdgpu_ring *ring);
static void vcn_v4_0_set_ras_funcs(struct amdgpu_device *adev);
/**
- * vcn_v4_0_early_init - set function pointers
+ * vcn_v4_0_early_init - set function pointers and load microcode
*
* @handle: amdgpu_device pointer
*
* Set ring and irq function pointers
+ * Load microcode from filesystem
*/
static int vcn_v4_0_early_init(void *handle)
{
@@ -88,7 +89,7 @@ static int vcn_v4_0_early_init(void *handle)
vcn_v4_0_set_irq_funcs(adev);
vcn_v4_0_set_ras_funcs(adev);
- return 0;
+ return amdgpu_vcn_early_init(adev);
}
/**
--
2.34.1
next prev parent reply other threads:[~2023-01-05 3:45 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 3:42 [PATCH v6 00/45] Recover from failure to probe GPU Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 01/45] drm/amd: Delay removal of the firmware framebuffer Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 02/45] drm/amd: Add a legacy mapping to "amdgpu_ucode_ip_version_decode" Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 03/45] drm/amd: Convert SMUv11 microcode to use `amdgpu_ucode_ip_version_decode` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 04/45] drm/amd: Convert SMUv13 " Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 05/45] drm/amd: Add a new helper for loading/validating microcode Mario Limonciello
2023-01-05 5:07 ` Lazar, Lijo
2023-01-05 5:23 ` Mario Limonciello
2023-01-05 5:29 ` Lazar, Lijo
2023-01-05 5:37 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 06/45] drm/amd: Use `amdgpu_ucode_request` helper for SDMA Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 07/45] drm/amd: Convert SDMA to use `amdgpu_ucode_ip_version_decode` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 08/45] drm/amd: Make SDMA firmware load failures less noisy Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 09/45] drm/amd: Use `amdgpu_ucode_*` helpers for VCN Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello [this message]
2023-01-05 3:42 ` [PATCH v6 11/45] drm/amd: Load MES microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 12/45] drm/amd: Use `amdgpu_ucode_*` helpers for MES Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 13/45] drm/amd: Remove superfluous assignment for `adev->mes.adev` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 14/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX9 Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 15/45] drm/amd: Load GFX9 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 16/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX10 Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 17/45] drm/amd: Load GFX10 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 18/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX11 Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 19/45] drm/amd: Load GFX11 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 20/45] drm/amd: Parse both v1 and v2 TA microcode headers using same function Mario Limonciello
2023-01-05 13:22 ` Lazar, Lijo
2023-01-05 16:04 ` Limonciello, Mario
2023-01-05 3:42 ` [PATCH v6 21/45] drm/amd: Avoid BUG() for case of SRIOV missing IP version Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 22/45] drm/amd: Load PSP microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 23/45] drm/amd: Use `amdgpu_ucode_*` helpers for PSP Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 24/45] drm/amd/display: Load DMUB microcode during early_init Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 25/45] drm/amd: Use `amdgpu_ucode_release` helper for DMUB Mario Limonciello
2023-01-05 17:17 ` Harry Wentland
2023-01-05 3:43 ` [PATCH v6 26/45] drm/amd: Use `amdgpu_ucode_*` helpers for SMU Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 27/45] drm/amd: Load SMU microcode during early_init Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 28/45] drm/amd: Optimize SRIOV switch/case for PSP microcode load Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 29/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX6 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 30/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX7 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 31/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX8 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 32/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC6 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 33/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC7 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 34/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC8 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 35/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA2.4 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 36/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA3.0 Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 37/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA on CIK Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 38/45] drm/amd: Use `amdgpu_ucode_*` helpers for UVD Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 39/45] drm/amd: Use `amdgpu_ucode_*` helpers for VCE Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 40/45] drm/amd: Use `amdgpu_ucode_*` helpers for CGS Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 41/45] drm/amd: Use `amdgpu_ucode_*` helpers for GPU info bin Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 42/45] drm/amd: Use `amdgpu_ucode_*` helpers for DMCU Mario Limonciello
2023-01-05 17:18 ` Harry Wentland
2023-01-05 3:43 ` [PATCH v6 43/45] drm/amd: Use `amdgpu_ucode_release` helper for powerplay Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 44/45] drm/amd: Use `amdgpu_ucode_release` helper for si Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 45/45] drm/amd: make amdgpu_ucode_validate static Mario Limonciello
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230105034327.1439-11-mario.limonciello@amd.com \
--to=mario.limonciello@amd.com \
--cc=Lijo.Lazar@amd.com \
--cc=Xinhui.Pan@amd.com \
--cc=airlied@gmail.com \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=christian.koenig@amd.com \
--cc=csoriano@redhat.com \
--cc=daniel@ffwll.ch \
--cc=dri-devel@lists.freedesktop.org \
--cc=javierm@redhat.com \
--cc=linux-kernel@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®