From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Linus Torvalds <torvalds@linux-foundation.org>,
Andrew Cooper <andrew.cooper3@citrix.com>,
Tom Lendacky <thomas.lendacky@amd.com>,
Paolo Bonzini <pbonzini@redhat.com>, Wei Liu <wei.liu@kernel.org>,
Arjan van de Ven <arjan@linux.intel.com>,
Juergen Gross <jgross@suse.com>
Subject: [patch 09/58] x86/apic: Get rid of boot_cpu_physical_apicid madness
Date: Tue, 18 Jul 2023 01:14:48 +0200 (CEST) [thread overview]
Message-ID: <20230717223223.619742209@linutronix.de> (raw)
In-Reply-To: <20230717223049.327865981@linutronix.de>
boot_cpu_physical_apicid is written in random places and in the last
consequence filled with the APIC ID read from the local APIC. That causes
it to have inconsistent state when the MPTABLE is broken. As a consequence
tons of moronic checks are sprinkled all over the place.
Consolidate the code and read it exactly once when either X2APIC mode is
detected early or when the APIC mapping is established.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
arch/x86/include/asm/apic.h | 2
arch/x86/kernel/apic/apic.c | 102 +++++++++++++-------------------------------
arch/x86/kernel/mpparse.c | 4 -
3 files changed, 34 insertions(+), 74 deletions(-)
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -247,7 +247,7 @@ static inline int x2apic_enabled(void)
#else /* !CONFIG_X86_X2APIC */
static inline void x2apic_setup(void) { }
static inline int x2apic_enabled(void) { return 0; }
-
+static inline u32 native_apic_msr_read(u32 reg) { BUG(); }
#define x2apic_mode (0)
#define x2apic_supported() (0)
#endif /* !CONFIG_X86_X2APIC */
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1318,8 +1318,7 @@ static int __init __apic_intr_mode_selec
if (!boot_cpu_has(X86_FEATURE_APIC) &&
APIC_INTEGRATED(boot_cpu_apic_version)) {
apic_is_disabled = true;
- pr_err(FW_BUG "Local APIC %d not detected, force emulation\n",
- boot_cpu_physical_apicid);
+ pr_err(FW_BUG "Local APIC not detected, force emulation\n");
return APIC_PIC;
}
#endif
@@ -1340,12 +1339,6 @@ static int __init __apic_intr_mode_selec
pr_info("APIC: SMP mode deactivated\n");
return APIC_SYMMETRIC_IO_NO_ROUTING;
}
-
- if (read_apic_id() != boot_cpu_physical_apicid) {
- panic("Boot APIC ID in local APIC unexpected (%d vs %d)",
- read_apic_id(), boot_cpu_physical_apicid);
- /* Or can we switch back to PIC here? */
- }
#endif
return APIC_SYMMETRIC_IO;
@@ -1741,6 +1734,23 @@ void apic_ap_setup(void)
end_local_APIC_setup();
}
+static __init void apic_read_boot_cpu_id(bool x2apic)
+{
+ /*
+ * This can be invoked from check_x2apic() before the APIC has been
+ * selected. But that code knows for sure that the BIOS enabled
+ * X2APIC.
+ */
+ if (x2apic) {
+ boot_cpu_physical_apicid = native_apic_msr_read(APIC_ID);
+ boot_cpu_apic_version = GET_APIC_VERSION(native_apic_msr_read(APIC_LVR));
+ } else {
+ boot_cpu_physical_apicid = read_apic_id();
+ boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
+ }
+}
+
+
#ifdef CONFIG_X86_X2APIC
int x2apic_mode;
EXPORT_SYMBOL_GPL(x2apic_mode);
@@ -1921,6 +1931,7 @@ void __init check_x2apic(void)
x2apic_state = X2APIC_ON_LOCKED;
else
x2apic_state = X2APIC_ON;
+ apic_read_boot_cpu_id(true);
} else if (!boot_cpu_has(X86_FEATURE_X2APIC)) {
x2apic_state = X2APIC_DISABLED;
}
@@ -2109,15 +2120,11 @@ static int __init detect_init_APIC(void)
*/
void __init init_apic_mappings(void)
{
- unsigned int new_apicid;
-
if (apic_validate_deadline_timer())
pr_info("TSC deadline timer available\n");
- if (x2apic_mode) {
- boot_cpu_physical_apicid = read_apic_id();
+ if (x2apic_mode)
return;
- }
/* If no local APIC can be found return early */
if (!smp_found_config && detect_init_APIC()) {
@@ -2134,39 +2141,19 @@ void __init init_apic_mappings(void)
if (!acpi_lapic && !smp_found_config)
register_lapic_address(apic_phys);
}
-
- /*
- * Fetch the APIC ID of the BSP in case we have a
- * default configuration (or the MP table is broken).
- */
- new_apicid = read_apic_id();
- if (boot_cpu_physical_apicid != new_apicid) {
- boot_cpu_physical_apicid = new_apicid;
- /*
- * yeah -- we lie about apic_version
- * in case if apic was disabled via boot option
- * but it's not a problem for SMP compiled kernel
- * since apic_intr_mode_select is prepared for such
- * a case and disable smp mode
- */
- boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
- }
}
void __init register_lapic_address(unsigned long address)
{
mp_lapic_addr = address;
- if (!x2apic_mode) {
- set_fixmap_nocache(FIX_APIC_BASE, address);
- apic_mmio_base = APIC_BASE;
- apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n",
- APIC_BASE, address);
- }
- if (boot_cpu_physical_apicid == -1U) {
- boot_cpu_physical_apicid = read_apic_id();
- boot_cpu_apic_version = GET_APIC_VERSION(apic_read(APIC_LVR));
- }
+ if (x2apic_mode)
+ return;
+
+ set_fixmap_nocache(FIX_APIC_BASE, address);
+ apic_mmio_base = APIC_BASE;
+ apic_printk(APIC_VERBOSE, "mapped APIC to %16lx (%16lx)\n", APIC_BASE, address);
+ apic_read_boot_cpu_id(false);
}
/*
@@ -2446,31 +2433,15 @@ int generic_processor_info(int apicid, i
phys_cpu_present_map);
/*
- * boot_cpu_physical_apicid is designed to have the apicid
- * returned by read_apic_id(), i.e, the apicid of the
- * currently booting-up processor. However, on some platforms,
- * it is temporarily modified by the apicid reported as BSP
- * through MP table. Concretely:
- *
- * - arch/x86/kernel/mpparse.c: MP_processor_info()
- * - arch/x86/mm/amdtopology.c: amd_numa_init()
- *
- * This function is executed with the modified
- * boot_cpu_physical_apicid. So, disabled_cpu_apicid kernel
- * parameter doesn't work to disable APs on kdump 2nd kernel.
- *
- * Since fixing handling of boot_cpu_physical_apicid requires
- * another discussion and tests on each platform, we leave it
- * for now and here we use read_apic_id() directly in this
- * function, generic_processor_info().
+ * boot_cpu_physical_apicid is guaranteed to contain the boot CPU
+ * APIC ID read from the local APIC when this function is invoked.
*/
- if (disabled_cpu_apicid != BAD_APICID &&
- disabled_cpu_apicid != read_apic_id() &&
+ if (disabled_cpu_apicid != boot_cpu_physical_apicid &&
disabled_cpu_apicid == apicid) {
int thiscpu = num_processors + disabled_cpus;
- pr_warn("APIC: Disabling requested cpu."
- " Processor %d/0x%x ignored.\n", thiscpu, apicid);
+ pr_warn("APIC: Disabling requested cpu. Processor %d/0x%x ignored.\n",
+ thiscpu, apicid);
disabled_cpus++;
return -ENODEV;
@@ -2626,15 +2597,6 @@ static void __init apic_bsp_up_setup(voi
{
#ifdef CONFIG_X86_64
apic_write(APIC_ID, apic->set_apic_id(boot_cpu_physical_apicid));
-#else
- /*
- * Hack: In case of kdump, after a crash, kernel might be booting
- * on a cpu with non-zero lapic id. But boot_cpu_physical_apicid
- * might be zero if read from MP tables. Get it from LAPIC.
- */
-# ifdef CONFIG_CRASH_DUMP
- boot_cpu_physical_apicid = read_apic_id();
-# endif
#endif
physid_set_mask_of_physid(boot_cpu_physical_apicid, &phys_cpu_present_map);
}
--- a/arch/x86/kernel/mpparse.c
+++ b/arch/x86/kernel/mpparse.c
@@ -58,10 +58,8 @@ static void __init MP_processor_info(str
apicid = m->apicid;
- if (m->cpuflag & CPU_BOOTPROCESSOR) {
+ if (m->cpuflag & CPU_BOOTPROCESSOR)
bootup_cpu = " (Bootup-CPU)";
- boot_cpu_physical_apicid = m->apicid;
- }
pr_info("Processor #%d%s\n", m->apicid, bootup_cpu);
generic_processor_info(apicid, m->apicver);
next prev parent reply other threads:[~2023-07-17 23:15 UTC|newest]
Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-17 23:14 [patch 00/58] x86/apic: Decrapification and static calls Thomas Gleixner
2023-07-17 23:14 ` [patch 01/58] x86/cpu: Make identify_boot_cpu() static Thomas Gleixner
2023-07-17 23:14 ` [patch 02/58] x86/cpu: Remove unused physid_*() nonsense Thomas Gleixner
2023-07-17 23:14 ` [patch 03/58] x86/apic: Rename disable_apic Thomas Gleixner
2023-07-17 23:14 ` [patch 04/58] x86/apic/ioapic: Rename skip_ioapic_setup Thomas Gleixner
2023-07-17 23:14 ` [patch 05/58] x86/apic: Remove pointless x86_bios_cpu_apicid Thomas Gleixner
2023-07-17 23:14 ` [patch 06/58] x86/apic: Get rid of hard_smp_processor_id() Thomas Gleixner
2023-07-17 23:14 ` [patch 07/58] x86/apic: Remove unused max_physical_apicid Thomas Gleixner
2023-07-17 23:14 ` [patch 08/58] x86/apic: Nuke unused apic::inquire_remote_apic() Thomas Gleixner
2023-07-17 23:14 ` Thomas Gleixner [this message]
2023-07-17 23:14 ` [patch 10/58] x86/apic: Register boot CPU APIC early Thomas Gleixner
2023-07-17 23:14 ` [patch 11/58] x86/apic: Remove the pointless APIC version check Thomas Gleixner
2023-07-17 23:14 ` [patch 12/58] x86/of: Fix the APIC address registration Thomas Gleixner
2023-07-17 23:14 ` [patch 13/58] x86/apic: Make some APIC init functions bool Thomas Gleixner
2023-07-17 23:14 ` [patch 14/58] x86/apic: Split register_apic_address() Thomas Gleixner
2023-07-17 23:14 ` [patch 15/58] x86/apic: Sanitize APIC address setup Thomas Gleixner
2023-07-17 23:14 ` [patch 16/58] x86/apic: Sanitize num_processors handling Thomas Gleixner
2023-07-17 23:15 ` [patch 17/58] x86/apic: Nuke another processor check Thomas Gleixner
2023-07-17 23:15 ` [patch 18/58] x86/apic: Remove check_phys_apicid_present() Thomas Gleixner
2023-07-17 23:15 ` [patch 19/58] x86/apic: Get rid of apic_phys Thomas Gleixner
2023-07-18 13:11 ` Thomas Gleixner
2023-07-20 4:18 ` Michael Kelley (LINUX)
2023-07-20 8:03 ` Thomas Gleixner
2023-07-21 4:17 ` Michael Kelley (LINUX)
2023-07-17 23:15 ` [patch 20/58] x86/apic/32: Sanitize logical APIC ID handling Thomas Gleixner
2023-07-17 23:15 ` [patch 21/58] x86/apic/32: Remove x86_cpu_to_logical_apicid Thomas Gleixner
2023-07-17 23:15 ` [patch 22/58] x86/apic/ipi: Code cleanup Thomas Gleixner
2023-07-17 23:15 ` [patch 23/58] x86/apic: Mop up early_per_cpu() abuse Thomas Gleixner
2023-07-17 23:15 ` [patch 24/58] x86/apic/32: Remove pointless default_acpi_madt_oem_check() Thomas Gleixner
2023-07-18 4:28 ` Juergen Gross
2023-07-17 23:15 ` [patch 25/58] x86/apic/32: Decrapify the def_bigsmp mechanism Thomas Gleixner
2023-07-17 23:15 ` [patch 26/58] x86/apic/32: Remove bigsmp_cpu_present_to_apicid() Thomas Gleixner
2023-07-17 23:15 ` [patch 27/58] x86/apic: Nuke empty init_apic_ldr() callbacks Thomas Gleixner
2023-07-17 23:15 ` [patch 28/58] x86/apic: Nuke apic::apicid_to_cpu_present() Thomas Gleixner
2023-07-17 23:15 ` [patch 29/58] x86/ioapic/32: Decrapify phys_id_present_map operation Thomas Gleixner
2023-07-17 23:15 ` [patch 30/58] x86/apic: Mop up *setup_apic_routing() Thomas Gleixner
2023-07-17 23:15 ` [patch 31/58] x86/apic: Mop up apic::apic_id_registered() Thomas Gleixner
2023-07-17 23:15 ` [patch 32/58] x86/apic/ipi: Tidy up the code and fixup comments Thomas Gleixner
2023-07-17 23:15 ` [patch 33/58] x86/apic: Consolidate wait_icr_idle() implementations Thomas Gleixner
2023-07-17 23:15 ` [patch 34/58] x86/apic: Allow apic::wait_icr_idle() to be NULL Thomas Gleixner
2023-07-17 23:15 ` [patch 35/58] x86/apic: Allow apic::safe_wait_icr_idle() " Thomas Gleixner
2023-07-17 23:15 ` [patch 36/58] x86/apic: Move safe wait_icr_idle() next to apic_mem_wait_icr_idle() Thomas Gleixner
2023-07-17 23:15 ` [patch 37/58] x86/apic/uv: Get rid of wrapper callbacks Thomas Gleixner
2023-07-17 23:15 ` [patch 38/58] x86/apic/x2apic: Share all common IPI functions Thomas Gleixner
2023-07-17 23:15 ` [patch 39/58] x86/apic/64: Uncopypaste probing Thomas Gleixner
2023-07-17 23:15 ` [patch 40/58] x86/apic: Wrap APIC ID validation into an inline Thomas Gleixner
2023-07-17 23:15 ` [patch 41/58] x86/apic: Add max_apic_id member Thomas Gleixner
2023-07-18 0:19 ` Linus Torvalds
2023-07-18 7:47 ` Thomas Gleixner
2023-07-18 15:54 ` Thomas Gleixner
2023-07-18 16:06 ` Linus Torvalds
2023-07-18 18:59 ` Thomas Gleixner
2023-07-17 23:15 ` [patch 42/58] x86/apic: Simplify X2APIC ID validation Thomas Gleixner
2023-07-17 23:15 ` [patch 43/58] x86/apic: Prepare x2APIC for using apic::max_apic_id Thomas Gleixner
2023-07-17 23:15 ` [patch 44/58] x86/apic: Sanitize APID ID range validation Thomas Gleixner
2023-07-17 23:15 ` [patch 45/58] x86/apic: Remove pointless NULL initializations Thomas Gleixner
2023-07-17 23:15 ` [patch 46/58] x86/apic/noop: Tidy up the code Thomas Gleixner
2023-07-17 23:15 ` [patch 47/58] x86/apic: Remove pointless arguments from [native_]eoi_write() Thomas Gleixner
2023-07-23 22:45 ` Wei Liu
2023-07-17 23:15 ` [patch 48/58] x86/apic: Nuke ack_APIC_irq() Thomas Gleixner
2023-07-23 22:45 ` Wei Liu
2023-07-17 23:15 ` [patch 49/58] x86/apic: Wrap apic->native_eoi() into a helper Thomas Gleixner
2023-07-17 23:15 ` [patch 50/58] x86/apic: Provide common init infrastructure Thomas Gleixner
2023-07-18 21:29 ` Peter Keresztes Schmidt
2023-07-18 21:51 ` Thomas Gleixner
2023-07-17 23:15 ` [patch 51/58] x86/apic: Provide apic_update_callback() Thomas Gleixner
2023-07-21 4:27 ` Michael Kelley (LINUX)
2023-07-17 23:15 ` [patch 52/58] x86/apic: Replace acpi_wake_cpu_handler_update() and apic_set_eoi_cb() Thomas Gleixner
2023-07-23 22:55 ` Wei Liu
2023-07-17 23:15 ` [patch 53/58] x86/apic: Convert other overrides to apic_update_callback() Thomas Gleixner
2023-07-21 17:49 ` Michael Kelley (LINUX)
2023-07-23 12:32 ` Thomas Gleixner
2023-07-17 23:15 ` [patch 54/58] x86/xen/apic: Mark apic __ro_after_init Thomas Gleixner
2023-07-18 15:31 ` Juergen Gross
2023-07-18 15:56 ` Thomas Gleixner
2023-07-18 16:08 ` Juergen Gross
2023-07-17 23:16 ` [patch 55/58] x86/apic: Mark all hotpath APIC callback wrappers __always_inline Thomas Gleixner
2023-07-17 23:16 ` [patch 56/58] x86/apic: Wrap IPI calls into helper functions Thomas Gleixner
2023-07-17 23:16 ` [patch 57/58] x86/apic: Provide static call infrastructure for APIC callbacks Thomas Gleixner
2023-07-18 9:19 ` Peter Zijlstra
2023-07-17 23:16 ` [patch 58/58] x86/apic: Turn on static calls Thomas Gleixner
2023-07-18 13:35 ` Thomas Gleixner
2023-07-18 0:27 ` [patch 00/58] x86/apic: Decrapification and " Linus Torvalds
2023-07-18 9:23 ` Peter Zijlstra
2023-07-18 14:29 ` Linus Walleij
2023-07-24 16:59 ` William Breathitt Gray
2023-07-20 12:43 ` Marc Gonzalez
2023-07-20 13:13 ` Peter Zijlstra
2023-07-20 13:47 ` Thomas Gleixner
2023-07-20 15:16 ` Marc Gonzalez
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