From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-pci@vger.kernel.org, "Bjorn Helgaas" <helgaas@kernel.org>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Lukas Wunner" <lukas@wunner.de>,
"Alexandru Gagniuc" <mr.nuke.me@gmail.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
linux-kernel@vger.kernel.org
Cc: "Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
"Srinivas Pandruvada" <srinivas.pandruvada@linux.intel.com>,
"Alex Deucher" <alexdeucher@gmail.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Subject: [PATCH 01/10] PCI: Protect Link Control 2 Register with RMW locking
Date: Thu, 17 Aug 2023 15:16:59 +0300 [thread overview]
Message-ID: <20230817121708.53213-2-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20230817121708.53213-1-ilpo.jarvinen@linux.intel.com>
PCIe Bandwidth Controller performs RMW accesses the Link Control 2
Register which can occur concurrently to other sources of Link Control
2 Register writes. Therefore, add Link Control 2 Register among the PCI
Express Capability Registers that need RMW locking.
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
include/linux/pci.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7ee498cd1f37..7b2927a90ee0 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1243,6 +1243,7 @@ static inline int pcie_capability_clear_and_set_word(struct pci_dev *dev,
{
switch (pos) {
case PCI_EXP_LNKCTL:
+ case PCI_EXP_LNKCTL2:
case PCI_EXP_RTCTL:
return pcie_capability_clear_and_set_word_locked(dev, pos,
clear, set);
--
2.30.2
next prev parent reply other threads:[~2023-08-17 12:18 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-17 12:16 [PATCH 00/10] Add PCIe Bandwidth Controller Ilpo Järvinen
2023-08-17 12:16 ` Ilpo Järvinen [this message]
2023-08-17 12:17 ` [PATCH 02/10] drm/radeon: Use RMW accessors for changing LNKCTL2 Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 03/10] drm/amdgpu: " Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 04/10] drm/IB/hfi1: " Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 05/10] PCI: Store all PCIe Supported Link Speeds Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 06/10] PCI: Cache PCIe device's Supported Speed Vector Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 07/10] PCI/LINK: Re-add BW notification portdrv as PCIe BW controller Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 08/10] PCI/bwctrl: Add "controller" part into PCIe bwctrl Ilpo Järvinen
2023-08-17 12:17 ` [PATCH 09/10] thermal: Add PCIe cooling driver Ilpo Järvinen
2023-08-23 19:47 ` Rafael J. Wysocki
2023-08-17 12:17 ` [PATCH 10/10] selftests/pcie_bwctrl: Create selftests Ilpo Järvinen
2023-09-04 6:26 ` [PATCH 00/10] Add PCIe Bandwidth Controller Krishna Chaitanya Chundru
2023-09-04 11:16 ` Ilpo Järvinen
2023-09-11 13:21 ` Krishna Chaitanya Chundru
2023-09-11 15:47 ` Ilpo Järvinen
2023-09-11 16:14 ` srinivas pandruvada
2023-09-12 12:52 ` Ilpo Järvinen
2023-09-12 17:45 ` srinivas pandruvada
2023-09-12 18:08 ` srinivas pandruvada
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