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From: Bhavya Kapoor <b-kapoor@ti.com>
To: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>
Cc: <conor+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<robh+dt@kernel.org>, <kristo@kernel.org>, <vigneshr@ti.com>,
	<nm@ti.com>, <b-kapoor@ti.com>
Subject: [PATCH 3/3] arm64: dts: ti: k3-j784s4-main: Add Itap Delay Value For DDR50 speed mode
Date: Fri, 1 Dec 2023 13:50:45 +0530	[thread overview]
Message-ID: <20231201082045.790478-4-b-kapoor@ti.com> (raw)
In-Reply-To: <20231201082045.790478-1-b-kapoor@ti.com>

DDR50 speed mode is enabled for MMCSD in J784s4 but its Itap Delay
Value is not present in the device tree. Thus, add Itap Delay Value
for MMCSD High Speed DDR which is DDR50 speed mode for J784s4 SoC
according to datasheet for J784s4.

[+] Refer to : section 7.10.5.17.2 MMC1/2 - SD/SDIO Interface, in
	J784s4 datasheet
- https://www.ti.com/lit/ds/symlink/tda4vh-q1.pdf

Signed-off-by: Bhavya Kapoor <b-kapoor@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index d89bcddcfe3d..b9a2358b1459 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -712,6 +712,7 @@ main_sdhci1: mmc@4fb0000 {
 		ti,itap-del-sel-sd-hs = <0x0>;
 		ti,itap-del-sel-sdr12 = <0x0>;
 		ti,itap-del-sel-sdr25 = <0x0>;
+		ti,itap-del-sel-ddr50 = <0x2>;
 		ti,clkbuf-sel = <0x7>;
 		ti,trm-icp = <0x8>;
 		dma-coherent;
-- 
2.34.1


  parent reply	other threads:[~2023-12-01  8:21 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-01  8:20 [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR Bhavya Kapoor
2023-12-01  8:20 ` [PATCH 1/3] arm64: dts: ti: k3-j7200-main: Add Itap Delay Value For DDR52 speed mode Bhavya Kapoor
2023-12-05 19:22   ` Judith Mendez
2023-12-01  8:20 ` [PATCH 2/3] arm64: dts: ti: k3-j721s2-main: Add Itap Delay Value For DDR50 " Bhavya Kapoor
2023-12-05 19:24   ` Judith Mendez
2023-12-01  8:20 ` Bhavya Kapoor [this message]
2023-12-05 19:25   ` [PATCH 3/3] arm64: dts: ti: k3-j784s4-main: " Judith Mendez
2023-12-05 18:31 ` [PATCH 0/3] arm64: dts: ti: Add Itap Delay Value For High Speed DDR Kumar, Udit
2023-12-14 11:07   ` Bhavya Kapoor
2023-12-14 15:00     ` Kumar, Udit
2023-12-15 17:21 ` Nishanth Menon

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