From: Andy Chiu <andy.chiu@sifive.com>
To: Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Andy Chiu <andy.chiu@sifive.com>,
Vincent Chen <vincent.chen@sifive.com>,
Heiko Stuebner <heiko@sntech.de>,
Conor Dooley <conor.dooley@microchip.com>,
Conor Dooley <conor@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Jonathan Corbet <corbet@lwn.net>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Greentime Hu <greentime.hu@sifive.com>,
Guo Ren <guoren@kernel.org>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org
Subject: [PATCH v3 1/7] riscv: vector: add a comment when calling riscv_setup_vsize()
Date: Mon, 18 Mar 2024 18:39:54 +0800 [thread overview]
Message-ID: <20240318-zve-detection-v3-1-e12d42107fa8@sifive.com> (raw)
In-Reply-To: <20240318-zve-detection-v3-0-e12d42107fa8@sifive.com>
The function would fail when it detects the calling hart's vlen doesn't
match the first one's. The boot hart is the first hart calling this
function during riscv_fill_hwcap, so it is impossible to fail here. Add
a comment about this behavior.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
Changelog v2:
- update the comment (Conor)
---
arch/riscv/kernel/cpufeature.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index afeae3ff43dc..db9fb90cb272 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -658,6 +658,10 @@ void __init riscv_fill_hwcap(void)
}
if (elf_hwcap & COMPAT_HWCAP_ISA_V) {
+ /*
+ * This callsite can't fail here. It cannot fail when called on
+ * the boot hart.
+ */
riscv_v_setup_vsize();
/*
* ISA string in device tree might have 'v' flag, but
--
2.44.0.rc2
next prev parent reply other threads:[~2024-03-18 10:40 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-18 10:39 [PATCH v3 0/7] Support Zve32[xf] and Zve64[xfd] Vector subextensions Andy Chiu
2024-03-18 10:39 ` Andy Chiu [this message]
2024-03-18 10:39 ` [PATCH v3 2/7] riscv: smp: fail booting up smp if inconsistent vlen is detected Andy Chiu
2024-03-20 9:26 ` [External] " yunhui cui
2024-03-18 10:39 ` [PATCH v3 3/7] riscv: cpufeature: call match_isa_ext() for single-letter extensions Andy Chiu
2024-03-18 10:39 ` [PATCH v3 4/7] riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection Andy Chiu
2024-03-18 10:39 ` [PATCH v3 5/7] dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description Andy Chiu
2024-03-18 10:39 ` [PATCH v3 6/7] riscv: hwprobe: add zve Vector subextensions into hwprobe interface Andy Chiu
2024-03-18 10:40 ` [PATCH v3 7/7] riscv: vector: adjust minimum Vector requirement to ZVE32X Andy Chiu
2024-03-18 17:32 ` kernel test robot
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