From: Jim Quinlan <james.quinlan@broadcom.com>
To: linux-pci@vger.kernel.org,
Nicolas Saenz Julienne <nsaenz@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Cyril Brulebois <kibi@debian.org>,
Stanimir Varbanov <svarbanov@suse.de>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
james.quinlan@broadcom.com
Cc: "Florian Fainelli" <florian.fainelli@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM
BCM2711/BCM2835 ARM ARCHITECTURE),
linux-kernel@vger.kernel.org (open list)
Subject: [PATCH v2 11/12] PCI: brcmstb: Enable 7712 SOCs
Date: Wed, 3 Jul 2024 14:02:55 -0400 [thread overview]
Message-ID: <20240703180300.42959-12-james.quinlan@broadcom.com> (raw)
In-Reply-To: <20240703180300.42959-1-james.quinlan@broadcom.com>
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The Broadcom STB 7712 is the sibling chip of the RPi 5 (2712).
Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
---
drivers/pci/controller/pcie-brcmstb.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
index 1c3ce0c182d1..39d7dea282ff 100644
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
@@ -1216,7 +1216,9 @@ static void brcm_config_clkreq(struct brcm_pcie *pcie)
* atypical and should happen only with older devices.
*/
clkreq_cntl |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK;
- brcm_extend_rbus_timeout(pcie);
+ /* 7712 does not have this (RGR1) timer */
+ if (pcie->type != BCM7712)
+ brcm_extend_rbus_timeout(pcie);
} else {
/*
@@ -1628,6 +1630,13 @@ static const int pcie_offsets_bmips_7425[] = {
[PCIE_INTR2_CPU_BASE] = 0x4300,
};
+static const int pcie_offset_bcm7712[] = {
+ [EXT_CFG_INDEX] = 0x9000,
+ [EXT_CFG_DATA] = 0x9004,
+ [PCIE_HARD_DEBUG] = 0x4304,
+ [PCIE_INTR2_CPU_BASE] = 0x4400,
+};
+
static const struct pcie_cfg_data generic_cfg = {
.offsets = pcie_offsets,
.type = GENERIC,
@@ -1686,6 +1695,13 @@ static const struct pcie_cfg_data bcm7216_cfg = {
.has_phy = true,
};
+static const struct pcie_cfg_data bcm7712_cfg = {
+ .offsets = pcie_offset_bcm7712,
+ .perst_set = brcm_pcie_perst_set_7278,
+ .bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
+ .type = BCM7712,
+};
+
static const struct of_device_id brcm_pcie_match[] = {
{ .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
{ .compatible = "brcm,bcm4908-pcie", .data = &bcm4908_cfg },
@@ -1695,6 +1711,7 @@ static const struct of_device_id brcm_pcie_match[] = {
{ .compatible = "brcm,bcm7445-pcie", .data = &generic_cfg },
{ .compatible = "brcm,bcm7435-pcie", .data = &bcm7435_cfg },
{ .compatible = "brcm,bcm7425-pcie", .data = &bcm7425_cfg },
+ { .compatible = "brcm,bcm7712-pcie", .data = &bcm7712_cfg },
{},
};
--
2.17.1
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next prev parent reply other threads:[~2024-07-03 18:03 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-03 18:02 [PATCH v2 00/12] PCI: brcnstb: Enable STB 7712 SOC Jim Quinlan
2024-07-03 18:02 ` [PATCH v2 01/12] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainer Jim Quinlan
2024-07-04 6:40 ` Krzysztof Kozlowski
2024-07-05 20:02 ` Jim Quinlan
2024-07-07 11:58 ` Krzysztof Kozlowski
2024-07-12 20:13 ` Jim Quinlan
2024-07-13 9:53 ` Krzysztof Kozlowski
2024-07-12 19:54 ` Jim Quinlan
2024-07-13 9:52 ` Krzysztof Kozlowski
2024-07-03 18:02 ` [PATCH v2 02/12] PCI: brcmstb: Use "clk_out" error path label Jim Quinlan
2024-07-04 11:40 ` Markus Elfring
2024-07-05 14:48 ` Jim Quinlan
2024-07-05 15:45 ` [v2 " Markus Elfring
2024-07-05 17:07 ` Jim Quinlan
2024-07-04 12:53 ` [PATCH v2 " Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 03/12] PCI: brcmstb: Use bridge reset if available Jim Quinlan
2024-07-03 18:02 ` [PATCH v2 04/12] PCI: brcmstb: Use swinit " Jim Quinlan
2024-07-04 12:56 ` Stanimir Varbanov
2024-07-05 17:46 ` Jim Quinlan
2024-07-08 9:37 ` Philipp Zabel
2024-07-08 11:14 ` Stanimir Varbanov
2024-07-08 13:26 ` Philipp Zabel
2024-07-08 14:38 ` Jim Quinlan
2024-07-05 8:23 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 05/12] PCI: brcmstb: Get resource before we start asserting reset controllers Jim Quinlan
2024-07-04 13:00 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 06/12] PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific Jim Quinlan
2024-07-04 13:05 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 07/12] PCI: brcmstb: Remove two unused constants from driver Jim Quinlan
2024-07-04 13:06 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 08/12] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Jim Quinlan
2024-07-04 13:08 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs Jim Quinlan
2024-07-04 13:30 ` Stanimir Varbanov
2024-07-04 20:11 ` Stanimir Varbanov
2024-07-04 20:17 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 10/12] PCI: brcmstb: Check return value of all reset_control_xxx calls Jim Quinlan
2024-07-04 13:49 ` Stanimir Varbanov
2024-07-05 14:28 ` Jim Quinlan
2024-07-03 18:02 ` Jim Quinlan [this message]
2024-07-04 13:51 ` [PATCH v2 11/12] PCI: brcmstb: Enable 7712 SOCs Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 12/12] PCI: brcmstb: Change field name from 'type' to 'model' Jim Quinlan
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