From: Stanimir Varbanov <svarbanov@suse.de>
To: Philipp Zabel <p.zabel@pengutronix.de>,
Jim Quinlan <james.quinlan@broadcom.com>,
Stanimir Varbanov <svarbanov@suse.de>
Cc: linux-pci@vger.kernel.org,
"Nicolas Saenz Julienne" <nsaenz@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Cyril Brulebois" <kibi@debian.org>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 04/12] PCI: brcmstb: Use swinit reset if available
Date: Mon, 8 Jul 2024 14:14:18 +0300 [thread overview]
Message-ID: <f89d7f45-5d2b-4d8b-9d6a-2d83cd584756@suse.de> (raw)
In-Reply-To: <7b03c38f44f295a5484d0162a193f41b39039b85.camel@pengutronix.de>
Hi Philipp,
On 7/8/24 12:37, Philipp Zabel wrote:
> On Fr, 2024-07-05 at 13:46 -0400, Jim Quinlan wrote:
>> On Thu, Jul 4, 2024 at 8:56 AM Stanimir Varbanov <svarbanov@suse.de> wrote:
>>>
>>> Hi Jim,
>>>
>>> On 7/3/24 21:02, Jim Quinlan wrote:
>>>> The 7712 SOC adds a software init reset device for the PCIe HW.
>>>> If found in the DT node, use it.
>>>>
>>>> Signed-off-by: Jim Quinlan <james.quinlan@broadcom.com>
>>>> ---
>>>> drivers/pci/controller/pcie-brcmstb.c | 19 +++++++++++++++++++
>>>> 1 file changed, 19 insertions(+)
>>>>
>>>> diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c
>>>> index 4104c3668fdb..69926ee5c961 100644
>>>> --- a/drivers/pci/controller/pcie-brcmstb.c
>>>> +++ b/drivers/pci/controller/pcie-brcmstb.c
>>>> @@ -266,6 +266,7 @@ struct brcm_pcie {
>>>> struct reset_control *rescal;
>>>> struct reset_control *perst_reset;
>>>> struct reset_control *bridge;
>>>> + struct reset_control *swinit;
>>>> int num_memc;
>>>> u64 memc_size[PCIE_BRCM_MAX_MEMC];
>>>> u32 hw_rev;
>>>> @@ -1626,6 +1627,13 @@ static int brcm_pcie_probe(struct platform_device *pdev)
>>>> dev_err(&pdev->dev, "could not enable clock\n");
>>>> return ret;
>>>> }
>>>> +
>>>> + pcie->swinit = devm_reset_control_get_optional_exclusive(&pdev->dev, "swinit");
>>>> + if (IS_ERR(pcie->swinit)) {
>>>> + ret = dev_err_probe(&pdev->dev, PTR_ERR(pcie->swinit),
>>>> + "failed to get 'swinit' reset\n");
>>>> + goto clk_out;
>>>> + }
>>>> pcie->rescal = devm_reset_control_get_optional_shared(&pdev->dev, "rescal");
>>>> if (IS_ERR(pcie->rescal)) {
>>>> ret = PTR_ERR(pcie->rescal);
>>>> @@ -1637,6 +1645,17 @@ static int brcm_pcie_probe(struct platform_device *pdev)
>>>> goto clk_out;
>>>> }
>>>>
>>>> + ret = reset_control_assert(pcie->swinit);
>>>> + if (ret) {
>>>> + dev_err_probe(&pdev->dev, ret, "could not assert reset 'swinit'\n");
>>>> + goto clk_out;
>>>> + }
>>>> + ret = reset_control_deassert(pcie->swinit);
>>>> + if (ret) {
>>>> + dev_err(&pdev->dev, "could not de-assert reset 'swinit' after asserting\n");
>>>> + goto clk_out;
>>>> + }
>>>
>>> why not call reset_control_reset(pcie->swinit) directly?
>> Hi Stan,
>>
>> There is no reset_control_reset() method defined for reset-brcmstb.c.
>> The only reason I can
>> think of for this is that it allows the callers of assert/deassert to
>> insert a delay if desired.
>
> The main reason for the existence of reset_control_reset() is that
> there are reset controllers that can only be triggered (e.g. by writing
> a bit to a self-clearing register) to produce a complete reset pulse,
> with assertion, delay, and deassertion all handled by the reset
> controller.
Got it. Thank you for explanation.
But, IMO that means that the consumer driver should have knowledge of
low-level reset implementation, which is not generic API?
Otherwise, I don't see a problem to implement asset/deassert sequence in
.reset op in this particular reset-brcmstb.c low-level driver.
~Stan
next prev parent reply other threads:[~2024-07-08 11:14 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-07-03 18:02 [PATCH v2 00/12] PCI: brcnstb: Enable STB 7712 SOC Jim Quinlan
2024-07-03 18:02 ` [PATCH v2 01/12] dt-bindings: PCI: Add Broadcom STB 7712 SOC, update maintainer Jim Quinlan
2024-07-04 6:40 ` Krzysztof Kozlowski
2024-07-05 20:02 ` Jim Quinlan
2024-07-07 11:58 ` Krzysztof Kozlowski
2024-07-12 20:13 ` Jim Quinlan
2024-07-13 9:53 ` Krzysztof Kozlowski
2024-07-12 19:54 ` Jim Quinlan
2024-07-13 9:52 ` Krzysztof Kozlowski
2024-07-03 18:02 ` [PATCH v2 02/12] PCI: brcmstb: Use "clk_out" error path label Jim Quinlan
2024-07-04 11:40 ` Markus Elfring
2024-07-05 14:48 ` Jim Quinlan
2024-07-05 15:45 ` [v2 " Markus Elfring
2024-07-05 17:07 ` Jim Quinlan
2024-07-04 12:53 ` [PATCH v2 " Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 03/12] PCI: brcmstb: Use bridge reset if available Jim Quinlan
2024-07-03 18:02 ` [PATCH v2 04/12] PCI: brcmstb: Use swinit " Jim Quinlan
2024-07-04 12:56 ` Stanimir Varbanov
2024-07-05 17:46 ` Jim Quinlan
2024-07-08 9:37 ` Philipp Zabel
2024-07-08 11:14 ` Stanimir Varbanov [this message]
2024-07-08 13:26 ` Philipp Zabel
2024-07-08 14:38 ` Jim Quinlan
2024-07-05 8:23 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 05/12] PCI: brcmstb: Get resource before we start asserting reset controllers Jim Quinlan
2024-07-04 13:00 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 06/12] PCI: brcmstb: PCI: brcmstb: Make HARD_DEBUG, INTR2_CPU_BASE offsets SoC-specific Jim Quinlan
2024-07-04 13:05 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 07/12] PCI: brcmstb: Remove two unused constants from driver Jim Quinlan
2024-07-04 13:06 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 08/12] PCI: brcmstb: Don't conflate the reset rescal with phy ctrl Jim Quinlan
2024-07-04 13:08 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 09/12] PCI: brcmstb: Refactor for chips with many regular inbound BARs Jim Quinlan
2024-07-04 13:30 ` Stanimir Varbanov
2024-07-04 20:11 ` Stanimir Varbanov
2024-07-04 20:17 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 10/12] PCI: brcmstb: Check return value of all reset_control_xxx calls Jim Quinlan
2024-07-04 13:49 ` Stanimir Varbanov
2024-07-05 14:28 ` Jim Quinlan
2024-07-03 18:02 ` [PATCH v2 11/12] PCI: brcmstb: Enable 7712 SOCs Jim Quinlan
2024-07-04 13:51 ` Stanimir Varbanov
2024-07-03 18:02 ` [PATCH v2 12/12] PCI: brcmstb: Change field name from 'type' to 'model' Jim Quinlan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=f89d7f45-5d2b-4d8b-9d6a-2d83cd584756@suse.de \
--to=svarbanov@suse.de \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=bhelgaas@google.com \
--cc=florian.fainelli@broadcom.com \
--cc=james.quinlan@broadcom.com \
--cc=jim2101024@gmail.com \
--cc=kibi@debian.org \
--cc=kw@linux.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rpi-kernel@lists.infradead.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=lpieralisi@kernel.org \
--cc=nsaenz@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®