From: Wei Huang <wei.huang2@amd.com>
To: <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-doc@vger.kernel.org>, <netdev@vger.kernel.org>
Cc: <Jonathan.Cameron@Huawei.com>, <helgaas@kernel.org>,
<corbet@lwn.net>, <davem@davemloft.net>, <edumazet@google.com>,
<kuba@kernel.org>, <pabeni@redhat.com>,
<alex.williamson@redhat.com>, <gospo@broadcom.com>,
<michael.chan@broadcom.com>, <ajit.khaparde@broadcom.com>,
<somnath.kotur@broadcom.com>, <andrew.gospodarek@broadcom.com>,
<manoj.panicker2@amd.com>, <Eric.VanTassell@amd.com>,
<wei.huang2@amd.com>, <vadim.fedorenko@linux.dev>,
<horms@kernel.org>, <bagasdotme@gmail.com>, <bhelgaas@google.com>,
<lukas@wunner.de>, <paul.e.luse@intel.com>, <jing2.liu@intel.com>
Subject: [PATCH V4 10/12] PCI/TPH: Add pci=nostmode to force TPH No ST Mode
Date: Thu, 22 Aug 2024 15:41:18 -0500 [thread overview]
Message-ID: <20240822204120.3634-11-wei.huang2@amd.com> (raw)
In-Reply-To: <20240822204120.3634-1-wei.huang2@amd.com>
When "No ST mode" is enabled, endpoint devices can generate TPH headers
but with all steering tags treated as zero. A steering tag of zero is
interpreted as "using the default policy" by the root complex. This is
essential to quantify the benefit of Steering Tags for some given
workloads.
Co-developed-by: Eric Van Tassell <Eric.VanTassell@amd.com>
Signed-off-by: Eric Van Tassell <Eric.VanTassell@amd.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
---
Documentation/admin-guide/kernel-parameters.txt | 3 +++
drivers/pci/pci.c | 2 ++
drivers/pci/pci.h | 2 ++
drivers/pci/pcie/tph.c | 12 ++++++++++++
4 files changed, 19 insertions(+)
diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index f1384c7b59c9..ed2ee97cf7fb 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -4617,6 +4617,9 @@
nomio [S390] Do not use MIO instructions.
norid [S390] ignore the RID field and force use of
one PCI domain per PCI function
+ nostmode [PCIE] If PCIe TPH Processing Hints (TPH) is
+ enabled, this kernel option forces all Steering
+ Tags to be treated as zero (aka "No ST Mode").
pcie_aspm= [PCIE] Forcibly enable or ignore PCIe Active State Power
Management.
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 1e4960994b1a..88aabac354c0 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -6870,6 +6870,8 @@ static int __init pci_setup(char *str)
pci_no_domains();
} else if (!strncmp(str, "noari", 5)) {
pcie_ari_disabled = true;
+ } else if (!strncmp(str, "nostmode", 8)) {
+ pci_tph_set_nostmode();
} else if (!strncmp(str, "cbiosize=", 9)) {
pci_cardbus_io_size = memparse(str + 9, &str);
} else if (!strncmp(str, "cbmemsize=", 10)) {
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index d7c7f86e8705..54d74f5ff861 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -574,10 +574,12 @@ static inline int pci_iov_bus_range(struct pci_bus *bus)
#ifdef CONFIG_PCIE_TPH
void pci_restore_tph_state(struct pci_dev *dev);
void pci_save_tph_state(struct pci_dev *dev);
+void pci_tph_set_nostmode(void);
void pci_tph_init(struct pci_dev *dev);
#else
static inline void pci_restore_tph_state(struct pci_dev *dev) { }
static inline void pci_save_tph_state(struct pci_dev *dev) { }
+static inline void pci_tph_set_nostmode(void) { }
static inline void pci_tph_init(struct pci_dev *dev) { }
#endif
diff --git a/drivers/pci/pcie/tph.c b/drivers/pci/pcie/tph.c
index b228ef5b7948..f723352adcf5 100644
--- a/drivers/pci/pcie/tph.c
+++ b/drivers/pci/pcie/tph.c
@@ -48,6 +48,8 @@ union st_info {
u64 value;
};
+static bool pci_tph_nostmode;
+
static u16 tph_extract_tag(enum tph_mem_type mem_type, u8 req_type,
union st_info *info)
{
@@ -433,6 +435,10 @@ int pcie_enable_tph(struct pci_dev *pdev, int mode)
return -EINVAL;
}
+ /* Honor "nostmode" kernel parameter */
+ if (pci_tph_nostmode)
+ pdev->tph_mode = PCI_TPH_NO_ST_MODE;
+
/* Get req_type supported by device and its Root Port */
reg = pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®);
if (FIELD_GET(PCI_TPH_CAP_EXT_TPH, reg))
@@ -545,6 +551,12 @@ void pci_save_tph_state(struct pci_dev *pdev)
}
}
+void pci_tph_set_nostmode(void)
+{
+ pci_tph_nostmode = true;
+ pr_info("PCIe TPH No ST Mode is enabled\n");
+}
+
void pci_tph_init(struct pci_dev *pdev)
{
pdev->tph_cap = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_TPH);
--
2.45.1
next prev parent reply other threads:[~2024-08-22 20:43 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 20:41 [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-08-22 20:41 ` [PATCH V4 01/12] PCI: Introduce PCIe TPH support framework Wei Huang
2024-08-22 20:41 ` [PATCH V4 02/12] PCI: Add TPH related register definition Wei Huang
2024-09-04 19:52 ` Bjorn Helgaas
2024-09-05 15:08 ` Wei Huang
2024-09-05 16:41 ` Bjorn Helgaas
2024-09-16 21:08 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 03/12] PCI/TPH: Add pcie_tph_modes() to query TPH modes Wei Huang
2024-09-04 19:40 ` Bjorn Helgaas
2024-09-05 14:46 ` Wei Huang
2024-09-05 15:12 ` Bjorn Helgaas
2024-08-22 20:41 ` [PATCH V4 04/12] PCI/TPH: Add pcie_enable_tph() to enable TPH Wei Huang
2024-09-13 11:35 ` Alejandro Lucero Palau
2024-08-22 20:41 ` [PATCH V4 05/12] PCI/TPH: Add pcie_disable_tph() to disable TPH Wei Huang
2024-08-22 20:41 ` [PATCH V4 06/12] PCI/TPH: Add pcie_tph_enabled() to check TPH state Wei Huang
2024-08-22 20:41 ` [PATCH V4 07/12] PCI/TPH: Add pcie_tph_set_st_entry() to set ST tag Wei Huang
2024-08-26 11:46 ` kernel test robot
2024-08-22 20:41 ` [PATCH V4 08/12] PCI/TPH: Add pcie_tph_get_cpu_st() to get " Wei Huang
2024-09-14 10:10 ` Alejandro Lucero Palau
2024-09-16 18:58 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 09/12] PCI/TPH: Add save/restore support for TPH Wei Huang
2024-09-04 20:11 ` Bjorn Helgaas
2024-08-22 20:41 ` Wei Huang [this message]
2024-08-22 20:41 ` [PATCH V4 11/12] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-08-26 20:22 ` Jakub Kicinski
2024-08-26 20:56 ` Andy Gospodarek
2024-08-26 22:49 ` Jakub Kicinski
2024-08-27 14:50 ` Andy Gospodarek
2024-08-27 19:05 ` Jakub Kicinski
2024-08-27 19:20 ` Michael Chan
2024-09-05 15:06 ` Bjorn Helgaas
2024-09-11 15:37 ` Alejandro Lucero Palau
2024-09-16 18:55 ` Wei Huang
2024-09-18 17:31 ` Alejandro Lucero Palau
2024-09-19 16:14 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 12/12] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-09-03 22:42 ` [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-09-04 18:49 ` Bjorn Helgaas
2024-09-04 19:48 ` Wei Huang
2024-09-04 20:03 ` Bjorn Helgaas
2024-09-04 20:20 ` Bjorn Helgaas
2024-09-05 15:45 ` Wei Huang
2024-09-05 16:44 ` Bjorn Helgaas
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