From: Alejandro Lucero Palau <alucerop@amd.com>
To: Wei Huang <wei.huang2@amd.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org, netdev@vger.kernel.org
Cc: Jonathan.Cameron@Huawei.com, helgaas@kernel.org, corbet@lwn.net,
davem@davemloft.net, edumazet@google.com, kuba@kernel.org,
pabeni@redhat.com, alex.williamson@redhat.com,
gospo@broadcom.com, michael.chan@broadcom.com,
ajit.khaparde@broadcom.com, somnath.kotur@broadcom.com,
andrew.gospodarek@broadcom.com, manoj.panicker2@amd.com,
Eric.VanTassell@amd.com, vadim.fedorenko@linux.dev,
horms@kernel.org, bagasdotme@gmail.com, bhelgaas@google.com,
lukas@wunner.de, paul.e.luse@intel.com, jing2.liu@intel.com
Subject: Re: [PATCH V4 04/12] PCI/TPH: Add pcie_enable_tph() to enable TPH
Date: Fri, 13 Sep 2024 12:35:01 +0100 [thread overview]
Message-ID: <fda48ab0-35bc-48ab-4b62-77e09758c760@amd.com> (raw)
In-Reply-To: <20240822204120.3634-5-wei.huang2@amd.com>
On 8/22/24 21:41, Wei Huang wrote:
> Allow drivers to enable TPH support using a specific ST mode. It checks
> whether the mode is actually supported by the device before enabling.
> Additionally determines what types of requests, TPH (8-bit) or Extended
> TPH (16-bit), can be issued by the device based on the device's TPH
> Requester capability and its Root Port's Completer capability.
>
> Co-developed-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Eric Van Tassell <Eric.VanTassell@amd.com>
> Signed-off-by: Wei Huang <wei.huang2@amd.com>
> Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
> Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
> Reviewed-by: Andy Gospodarek <andrew.gospodarek@broadcom.com>
> ---
> drivers/pci/pcie/tph.c | 92 +++++++++++++++++++++++++++++++++++++++++
> include/linux/pci-tph.h | 3 ++
> include/linux/pci.h | 3 ++
> 3 files changed, 98 insertions(+)
>
> diff --git a/drivers/pci/pcie/tph.c b/drivers/pci/pcie/tph.c
> index a28dced3097d..14ad8c5e895c 100644
> --- a/drivers/pci/pcie/tph.c
> +++ b/drivers/pci/pcie/tph.c
> @@ -7,6 +7,7 @@
> * Wei Huang <wei.huang2@amd.com>
> */
> #include <linux/pci.h>
> +#include <linux/bitfield.h>
> #include <linux/pci-tph.h>
>
> #include "../pci.h"
> @@ -21,6 +22,97 @@ static u8 get_st_modes(struct pci_dev *pdev)
> return reg;
> }
>
> +/* Return device's Root Port completer capability */
> +static u8 get_rp_completer_type(struct pci_dev *pdev)
> +{
> + struct pci_dev *rp;
> + u32 reg;
> + int ret;
> +
> + rp = pcie_find_root_port(pdev);
> + if (!rp)
> + return 0;
> +
> + ret = pcie_capability_read_dword(rp, PCI_EXP_DEVCAP2, ®);
> + if (ret)
> + return 0;
> +
> + return FIELD_GET(PCI_EXP_DEVCAP2_TPH_COMP_MASK, reg);
> +}
> +
> +/**
> + * pcie_enable_tph - Enable TPH support for device using a specific ST mode
> + * @pdev: PCI device
> + * @mode: ST mode to enable, as returned by pcie_tph_modes()
> + *
> + * Checks whether the mode is actually supported by the device before enabling
> + * and returns an error if not. Additionally determines what types of requests,
> + * TPH or extended TPH, can be issued by the device based on its TPH requester
> + * capability and the Root Port's completer capability.
> + *
> + * Return: 0 on success, otherwise negative value (-errno)
> + */
> +int pcie_enable_tph(struct pci_dev *pdev, int mode)
> +{
> + u32 reg;
> + u8 dev_modes;
> + u8 rp_req_type;
> +
> + if (!pdev->tph_cap)
> + return -EINVAL;
> +
> + if (pdev->tph_enabled)
> + return -EBUSY;
> +
> + /* Check ST mode comptability */
> + dev_modes = get_st_modes(pdev);
> + if (!(mode & dev_modes))
> + return -EINVAL;
> +
> + /* Select a supported mode */
> + switch (mode) {
> + case PCI_TPH_CAP_INT_VEC:
> + pdev->tph_mode = PCI_TPH_INT_VEC_MODE;
> + break;
> + case PCI_TPH_CAP_DEV_SPEC:
> + pdev->tph_mode = PCI_TPH_DEV_SPEC_MODE;
> + break;
> + case PCI_TPH_CAP_NO_ST:
> + pdev->tph_mode = PCI_TPH_NO_ST_MODE;
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + /* Get req_type supported by device and its Root Port */
> + reg = pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®);
> + if (FIELD_GET(PCI_TPH_CAP_EXT_TPH, reg))
> + pdev->tph_req_type = PCI_TPH_REQ_EXT_TPH;
> + else
> + pdev->tph_req_type = PCI_TPH_REQ_TPH_ONLY;
> +
> + rp_req_type = get_rp_completer_type(pdev);
> +
> + /* Final req_type is the smallest value of two */
> + pdev->tph_req_type = min(pdev->tph_req_type, rp_req_type);
> +
> + /* Write them into TPH control register */
> + pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, ®);
No error checked. Same with below pci_write_config_dword.
> +
> + reg &= ~PCI_TPH_CTRL_MODE_SEL_MASK;
> + reg |= FIELD_PREP(PCI_TPH_CTRL_MODE_SEL_MASK, pdev->tph_mode);
> +
> + reg &= ~PCI_TPH_CTRL_REQ_EN_MASK;
> + reg |= FIELD_PREP(PCI_TPH_CTRL_REQ_EN_MASK, pdev->tph_req_type);
> +
> + pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg);
> +
> + pdev->tph_enabled = 1;
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(pcie_enable_tph);
> +
> /**
> * pcie_tph_modes - Get the ST modes supported by device
> * @pdev: PCI device
> diff --git a/include/linux/pci-tph.h b/include/linux/pci-tph.h
> index fa378afe9c7e..cdf561076484 100644
> --- a/include/linux/pci-tph.h
> +++ b/include/linux/pci-tph.h
> @@ -10,8 +10,11 @@
> #define LINUX_PCI_TPH_H
>
> #ifdef CONFIG_PCIE_TPH
> +int pcie_enable_tph(struct pci_dev *pdev, int mode);
> int pcie_tph_modes(struct pci_dev *pdev);
> #else
> +static inline int pcie_enable_tph(struct pci_dev *pdev, int mode)
> +{ return -EINVAL; }
> static inline int pcie_tph_modes(struct pci_dev *pdev) { return 0; }
> #endif
>
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index c59e7ecab491..6f05deb6a0bf 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -433,6 +433,7 @@ struct pci_dev {
> unsigned int ats_enabled:1; /* Address Translation Svc */
> unsigned int pasid_enabled:1; /* Process Address Space ID */
> unsigned int pri_enabled:1; /* Page Request Interface */
> + unsigned int tph_enabled:1; /* TLP Processing Hints */
> unsigned int is_managed:1; /* Managed via devres */
> unsigned int is_msi_managed:1; /* MSI release via devres installed */
> unsigned int needs_freset:1; /* Requires fundamental reset */
> @@ -533,6 +534,8 @@ struct pci_dev {
>
> #ifdef CONFIG_PCIE_TPH
> u16 tph_cap; /* TPH capability offset */
> + u8 tph_mode; /* TPH mode */
> + u8 tph_req_type; /* TPH requester type */
> #endif
> };
>
next prev parent reply other threads:[~2024-09-13 11:36 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-22 20:41 [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-08-22 20:41 ` [PATCH V4 01/12] PCI: Introduce PCIe TPH support framework Wei Huang
2024-08-22 20:41 ` [PATCH V4 02/12] PCI: Add TPH related register definition Wei Huang
2024-09-04 19:52 ` Bjorn Helgaas
2024-09-05 15:08 ` Wei Huang
2024-09-05 16:41 ` Bjorn Helgaas
2024-09-16 21:08 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 03/12] PCI/TPH: Add pcie_tph_modes() to query TPH modes Wei Huang
2024-09-04 19:40 ` Bjorn Helgaas
2024-09-05 14:46 ` Wei Huang
2024-09-05 15:12 ` Bjorn Helgaas
2024-08-22 20:41 ` [PATCH V4 04/12] PCI/TPH: Add pcie_enable_tph() to enable TPH Wei Huang
2024-09-13 11:35 ` Alejandro Lucero Palau [this message]
2024-08-22 20:41 ` [PATCH V4 05/12] PCI/TPH: Add pcie_disable_tph() to disable TPH Wei Huang
2024-08-22 20:41 ` [PATCH V4 06/12] PCI/TPH: Add pcie_tph_enabled() to check TPH state Wei Huang
2024-08-22 20:41 ` [PATCH V4 07/12] PCI/TPH: Add pcie_tph_set_st_entry() to set ST tag Wei Huang
2024-08-26 11:46 ` kernel test robot
2024-08-22 20:41 ` [PATCH V4 08/12] PCI/TPH: Add pcie_tph_get_cpu_st() to get " Wei Huang
2024-09-14 10:10 ` Alejandro Lucero Palau
2024-09-16 18:58 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 09/12] PCI/TPH: Add save/restore support for TPH Wei Huang
2024-09-04 20:11 ` Bjorn Helgaas
2024-08-22 20:41 ` [PATCH V4 10/12] PCI/TPH: Add pci=nostmode to force TPH No ST Mode Wei Huang
2024-08-22 20:41 ` [PATCH V4 11/12] bnxt_en: Add TPH support in BNXT driver Wei Huang
2024-08-26 20:22 ` Jakub Kicinski
2024-08-26 20:56 ` Andy Gospodarek
2024-08-26 22:49 ` Jakub Kicinski
2024-08-27 14:50 ` Andy Gospodarek
2024-08-27 19:05 ` Jakub Kicinski
2024-08-27 19:20 ` Michael Chan
2024-09-05 15:06 ` Bjorn Helgaas
2024-09-11 15:37 ` Alejandro Lucero Palau
2024-09-16 18:55 ` Wei Huang
2024-09-18 17:31 ` Alejandro Lucero Palau
2024-09-19 16:14 ` Wei Huang
2024-08-22 20:41 ` [PATCH V4 12/12] bnxt_en: Pass NQ ID to the FW when allocating RX/RX AGG rings Wei Huang
2024-09-03 22:42 ` [PATCH V4 00/12] PCIe TPH and cache direct injection support Wei Huang
2024-09-04 18:49 ` Bjorn Helgaas
2024-09-04 19:48 ` Wei Huang
2024-09-04 20:03 ` Bjorn Helgaas
2024-09-04 20:20 ` Bjorn Helgaas
2024-09-05 15:45 ` Wei Huang
2024-09-05 16:44 ` Bjorn Helgaas
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