* [PATCH v14 01/31] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 02/31] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
` (29 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise Yosemite 4 devicetree for devices behind i2c-mux
- Add gpio and eeprom behind i2c-mux
- Remove redundant idle-state setting for i2c-mux
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 381 ++++++++++++++++--
1 file changed, 347 insertions(+), 34 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 98477792aa00..ce206e2c461b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -17,6 +17,25 @@ aliases {
serial6 = &uart7;
serial7 = &uart8;
serial8 = &uart9;
+
+ i2c16 = &imux16;
+ i2c17 = &imux17;
+ i2c18 = &imux18;
+ i2c19 = &imux19;
+ i2c20 = &imux20;
+ i2c21 = &imux21;
+ i2c22 = &imux22;
+ i2c23 = &imux23;
+ i2c24 = &imux24;
+ i2c25 = &imux25;
+ i2c26 = &imux26;
+ i2c27 = &imux27;
+ i2c28 = &imux28;
+ i2c29 = &imux29;
+ i2c30 = &imux30;
+ i2c31 = &imux31;
+ i2c32 = &imux32;
+ i2c33 = &imux33;
};
chosen {
@@ -259,9 +278,109 @@ &i2c8 {
bus-frequency = <400000>;
i2c-mux@70 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x70>;
+
+ imux16: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux17: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux18: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux19: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
};
};
@@ -270,15 +389,174 @@ &i2c9 {
bus-frequency = <400000>;
i2c-mux@71 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x71>;
+
+ imux20: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux21: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux22: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
+
+ imux23: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ gpio@49 {
+ compatible = "nxp,pca9537";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c128";
+ reg = <0x51>;
+ };
+
+ eeprom@54 {
+ compatible = "atmel,24c128";
+ reg = <0x54>;
+ };
+ };
};
};
&i2c10 {
status = "okay";
bus-frequency = <400000>;
+ i2c-mux@74 {
+ compatible = "nxp,pca9544";
+ i2c-mux-idle-disconnect;
+ reg = <0x74>;
+
+ imux28: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "","","","",
+ "NIC0_MAIN_PWR_EN","NIC1_MAIN_PWR_EN",
+ "NIC2_MAIN_PWR_EN","NIC3_MAIN_PWR_EN",
+ "","","","","","","","",
+ "","","","","","","","",
+ "","","","","","","","";
+ };
+ };
+
+ imux29: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+ };
};
&i2c11 {
@@ -440,16 +718,14 @@ eeprom@51 {
reg = <0x51>;
};
- i2c-mux@71 {
- compatible = "nxp,pca9846";
+ i2c-mux@74 {
+ compatible = "nxp,pca9546";
#address-cells = <1>;
#size-cells = <0>;
-
- idle-state = <0>;
i2c-mux-idle-disconnect;
- reg = <0x71>;
+ reg = <0x74>;
- i2c@0 {
+ imux30: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -457,26 +733,26 @@ i2c@0 {
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
pwm@20{
- compatible = "max31790";
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- pwm@23{
- compatible = "max31790";
- reg = <0x23>;
- #address-cells = <1>;
- #size-cells = <0>;
+ pwm@2f{
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
+ reg = <0x2f>;
};
adc@33 {
@@ -499,34 +775,34 @@ gpio@61 {
};
};
- i2c@1 {
+ imux31: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
+ reg = <1>;
adc@1f {
compatible = "ti,adc128d818";
reg = <0x1f>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
pwm@20{
- compatible = "max31790";
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
reg = <0x20>;
- #address-cells = <1>;
- #size-cells = <0>;
};
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
- pwm@23{
- compatible = "max31790";
- reg = <0x23>;
- #address-cells = <1>;
- #size-cells = <0>;
+ pwm@2f{
+ compatible = "maxim,max31790";
+ pwm-as-tach = <4 5>;
+ reg = <0x2f>;
};
adc@33 {
@@ -554,12 +830,10 @@ i2c-mux@73 {
compatible = "nxp,pca9544";
#address-cells = <1>;
#size-cells = <0>;
-
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x73>;
- i2c@0 {
+ imux32: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
@@ -570,10 +844,10 @@ adc@35 {
};
};
- i2c@1 {
+ imux33: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <0>;
+ reg = <1>;
adc@35 {
compatible = "maxim,max11617";
@@ -596,9 +870,48 @@ mctp@10 {
i2c-mux@72 {
compatible = "nxp,pca9544";
- idle-state = <0>;
i2c-mux-idle-disconnect;
reg = <0x72>;
+
+ imux24: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux25: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux26: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
+
+ imux27: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ temperature-sensor@1f {
+ compatible = "ti,tmp421";
+ reg = <0x1f>;
+ };
+ };
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 02/31] ARM: dts: aspeed: yosemite4: Enable adc15
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 01/31] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 03/31] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
` (28 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Enable Yosemite 4 adc15 config
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index ce206e2c461b..0d659ee2bc19 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -51,7 +51,7 @@ iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
- <&adc1 0>, <&adc1 1>;
+ <&adc1 0>, <&adc1 1>, <&adc1 7>;
};
};
@@ -925,10 +925,10 @@ &pinctrl_adc4_default &pinctrl_adc5_default
&adc1 {
status = "okay";
- pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>;
+ pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>
+ &pinctrl_adc15_default>;
};
-
&ehci0 {
status = "okay";
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 03/31] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 01/31] ARM: dts: aspeed: yosemite4: Revise i2c-mux devices Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 02/31] ARM: dts: aspeed: yosemite4: Enable adc15 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 04/31] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
` (27 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
enable spi-gpio setting for spi flash
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 0d659ee2bc19..575abdd530df 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -53,6 +53,24 @@ iio-hwmon {
<&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
<&adc1 0>, <&adc1 1>, <&adc1 7>;
};
+
+ spi_gpio: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-sck = <&gpio0 ASPEED_GPIO(X, 3) GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>;
+ gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+ cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
+
+ tpmdev@0 {
+ compatible = "tcg,tpm_tis-spi";
+ spi-max-frequency = <33000000>;
+ reg = <0>;
+ };
+ };
};
&uart1 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 04/31] ARM: dts: aspeed: yosemite4: Enable watchdog2
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (2 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 03/31] ARM: dts: aspeed: yosemite4: Enable spi-gpio setting Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 05/31] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
` (26 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
enable watchdog2 setting
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 575abdd530df..51b4e9ae13cc 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -120,6 +120,13 @@ &wdt1 {
aspeed,ext-pulse-duration = <256>;
};
+&wdt2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdtrst2_default>;
+ aspeed,reset-type = "system";
+};
+
&mac2 {
status = "okay";
pinctrl-names = "default";
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 05/31] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (3 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 04/31] ARM: dts: aspeed: yosemite4: Enable watchdog2 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 06/31] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
` (25 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise quad mode to dual mode to avoid WP pin influnece the SPI
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 51b4e9ae13cc..e5354efbb903 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -149,15 +149,17 @@ flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
- spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
spi-max-frequency = <50000000>;
-#include "openbmc-flash-layout-64.dtsi"
+#include "openbmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "bmc2";
- spi-rx-bus-width = <4>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
spi-max-frequency = <50000000>;
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 06/31] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (4 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 05/31] ARM: dts: aspeed: yosemite4: Revise quad mode to dual mode Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 07/31] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
` (24 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise power sensor adm1281 for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 24 ++++++++++++-------
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index e5354efbb903..7b79fcd77c8c 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -176,8 +176,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -193,8 +194,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -210,8 +212,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -227,8 +230,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -244,8 +248,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -261,8 +266,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -278,8 +284,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
@@ -295,8 +302,9 @@ mctp@10 {
};
power-sensor@40 {
- compatible = "adi,adm1278";
+ compatible = "adi,adm1281";
reg = <0x40>;
+ shunt-resistor-micro-ohms = <500>;
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 07/31] ARM: dts: aspeed: yosemite4: Add gpio pca9506
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (5 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 06/31] ARM: dts: aspeed: yosemite4: Revise power sensor adm1281 for schematic change Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 08/31] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
` (23 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add gpio pca9506 I/O expander for yv4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 252 ++++++++++++++++++
1 file changed, 252 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 7b79fcd77c8c..f4d27f1ffdb8 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -175,6 +175,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -193,6 +221,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -211,6 +267,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -229,6 +313,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -247,6 +359,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -265,6 +405,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -283,6 +451,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -301,6 +497,34 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
power-sensor@40 {
compatible = "adi,adm1281";
reg = <0x40>;
@@ -690,6 +914,34 @@ ipmb@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&i2c14 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 08/31] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (6 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 07/31] ARM: dts: aspeed: yosemite4: Add gpio pca9506 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 09/31] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
` (22 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove space for adm1272 compatible
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f4d27f1ffdb8..b11951c2f71e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -821,12 +821,12 @@ imux29: i2c@1 {
&i2c11 {
status = "okay";
power-sensor@10 {
- compatible = "adi, adm1272";
+ compatible = "adi,adm1272";
reg = <0x10>;
};
power-sensor@12 {
- compatible = "adi, adm1272";
+ compatible = "adi,adm1272";
reg = <0x12>;
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 09/31] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (7 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 08/31] ARM: dts: aspeed: yosemite4: Remove space for adm1272 compatible Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 10/31] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
` (21 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Enable interrupt setting for pca9555
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 56 +++++++++++++++++--
1 file changed, 52 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index b11951c2f71e..09bbbcb192f5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -832,30 +832,78 @@ power-sensor@12 {
gpio@20 {
compatible = "nxp,pca9555";
- reg = <0x20>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x20>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "P48V_OCP_GPIO1","P48V_OCP_GPIO2",
+ "P48V_OCP_GPIO3","FAN_BOARD_0_REVISION_0_R",
+ "FAN_BOARD_0_REVISION_1_R","FAN_BOARD_1_REVISION_0_R",
+ "FAN_BOARD_1_REVISION_1_R","RST_MUX_R_N",
+ "RST_LED_CONTROL_FAN_BOARD_0_N","RST_LED_CONTROL_FAN_BOARD_1_N",
+ "RST_IOEXP_FAN_BOARD_0_N","RST_IOEXP_FAN_BOARD_1_N",
+ "PWRGD_LOAD_SWITCH_FAN_BOARD_0_R","PWRGD_LOAD_SWITCH_FAN_BOARD_1_R",
+ "","";
};
gpio@21 {
compatible = "nxp,pca9555";
- reg = <0x21>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x21>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC_OCP_SLOT_ODD_GPIO1","HSC_OCP_SLOT_ODD_GPIO2",
+ "HSC_OCP_SLOT_ODD_GPIO3","HSC_OCP_SLOT_EVEN_GPIO1",
+ "HSC_OCP_SLOT_EVEN_GPIO2","HSC_OCP_SLOT_EVEN_GPIO3",
+ "ADC_TYPE_0_R","ADC_TYPE_1_R",
+ "MEDUSA_BOARD_REV_0","MEDUSA_BOARD_REV_1",
+ "MEDUSA_BOARD_REV_2","MEDUSA_BOARD_TYPE",
+ "DELTA_MODULE_TYPE","P12V_HSC_TYPE",
+ "","";
};
gpio@22 {
compatible = "nxp,pca9555";
- reg = <0x22>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x22>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "CARD_TYPE_SLOT1","CARD_TYPE_SLOT2",
+ "CARD_TYPE_SLOT3","CARD_TYPE_SLOT4",
+ "CARD_TYPE_SLOT5","CARD_TYPE_SLOT6",
+ "CARD_TYPE_SLOT7","CARD_TYPE_SLOT8",
+ "OC_P48V_HSC_0_N","FLT_P48V_HSC_0_N",
+ "OC_P48V_HSC_1_N","FLT_P48V_HSC_1_N",
+ "EN_P48V_AUX_0","EN_P48V_AUX_1",
+ "PWRGD_P12V_AUX_0","PWRGD_P12V_AUX_1";
};
gpio@23 {
compatible = "nxp,pca9555";
- reg = <0x23>;
+ pinctrl-names = "default";
gpio-controller;
#gpio-cells = <2>;
+ reg = <0x23>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
+ gpio-line-names =
+ "HSC1_ALERT1_R_N","HSC2_ALERT1_R_N",
+ "HSC3_ALERT1_R_N","HSC4_ALERT1_R_N",
+ "HSC5_ALERT1_R_N","HSC6_ALERT1_R_N",
+ "HSC7_ALERT1_R_N","HSC8_ALERT1_R_N",
+ "HSC1_ALERT2_R_N","HSC2_ALERT2_R_N",
+ "HSC3_ALERT2_R_N","HSC4_ALERT2_R_N",
+ "HSC5_ALERT2_R_N","HSC6_ALERT2_R_N",
+ "HSC7_ALERT2_R_N","HSC8_ALERT2_R_N";
};
temperature-sensor@48 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 10/31] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (8 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 09/31] ARM: dts: aspeed: yosemite4: Enable interrupt setting for pca9555 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 11/31] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
` (20 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add power sensor for power module reading
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 09bbbcb192f5..139a09de24cf 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -906,6 +906,11 @@ gpio@23 {
"HSC7_ALERT2_R_N","HSC8_ALERT2_R_N";
};
+ power-sensor@40 {
+ compatible = "mps,mp5023";
+ reg = <0x40>;
+ };
+
temperature-sensor@48 {
compatible = "ti,tmp75";
reg = <0x48>;
@@ -930,6 +935,26 @@ eeprom@54 {
compatible = "atmel,24c256";
reg = <0x54>;
};
+
+ power-sensor@62 {
+ compatible = "pmbus";
+ reg = <0x62>;
+ };
+
+ power-sensor@64 {
+ compatible = "pmbus";
+ reg = <0x64>;
+ };
+
+ power-sensor@65 {
+ compatible = "pmbus";
+ reg = <0x65>;
+ };
+
+ power-sensor@68 {
+ compatible = "pmbus";
+ reg = <0x68>;
+ };
};
&i2c12 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 11/31] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (9 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 10/31] ARM: dts: aspeed: yosemite4: Add power sensor for power module reading Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 12/31] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
` (19 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add eeprom for yosemite4 use
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 139a09de24cf..e83cb51ac19d 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -932,7 +932,7 @@ temperature-sensor@4b {
};
eeprom@54 {
- compatible = "atmel,24c256";
+ compatible = "atmel,24c128";
reg = <0x54>;
};
@@ -971,6 +971,11 @@ eeprom@50 {
reg = <0x50>;
};
+ eeprom@54 {
+ compatible = "atmel,24c64";
+ reg = <0x54>;
+ };
+
rtc@6f {
compatible = "nuvoton,nct3018y";
reg = <0x6f>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 12/31] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (10 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 11/31] ARM: dts: aspeed: yosemite4: Add eeprom for yosemite4 use Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 13/31] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
` (18 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove temperature sensor for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index e83cb51ac19d..2c0c37b3ee5b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -921,16 +921,6 @@ temperature-sensor@49 {
reg = <0x49>;
};
- temperature-sensor@4a {
- compatible = "ti,tmp75";
- reg = <0x4a>;
- };
-
- temperature-sensor@4b {
- compatible = "ti,tmp75";
- reg = <0x4b>;
- };
-
eeprom@54 {
compatible = "atmel,24c128";
reg = <0x54>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 13/31] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode for yosemite4 schematic change
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (11 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 12/31] ARM: dts: aspeed: yosemite4: Remove temperature sensor for yosemite4 schematic change Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 14/31] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
` (17 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise adc128d818 adc mode for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 2c0c37b3ee5b..1765a0bb70d7 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1018,19 +1018,19 @@ &i2c14 {
adc@1d {
compatible = "ti,adc128d818";
reg = <0x1d>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
- adc@35 {
+ adc@36 {
compatible = "ti,adc128d818";
- reg = <0x35>;
- ti,mode = /bits/ 8 <2>;
+ reg = <0x36>;
+ ti,mode = /bits/ 8 <1>;
};
adc@37 {
compatible = "ti,adc128d818";
reg = <0x37>;
- ti,mode = /bits/ 8 <2>;
+ ti,mode = /bits/ 8 <1>;
};
power-sensor@40 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 14/31] ARM: dts: aspeed: yosemite4: Revise ina233 config for yosemite4 schematic change
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (12 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 13/31] ARM: dts: aspeed: yosemite4: Revise adc128d818 adc mode " Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 15/31] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
` (16 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise ina233 config for yosemite4 schematic change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 20 ++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 1765a0bb70d7..df389b506b4b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1034,28 +1034,38 @@ adc@37 {
};
power-sensor@40 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x40>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x41>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x42>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x43>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
- compatible = "ti,ina230";
+ compatible = "ti,ina233";
reg = <0x44>;
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
};
temperature-sensor@4e {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 15/31] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (13 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 14/31] ARM: dts: aspeed: yosemite4: Revise ina233 config " Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 16/31] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
` (15 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Remove idle state setting for yosemite4 NIC connection
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index df389b506b4b..c0497a1aa93e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1235,7 +1235,6 @@ mctp@10 {
i2c-mux@72 {
compatible = "nxp,pca9544";
- i2c-mux-idle-disconnect;
reg = <0x72>;
imux24: i2c@0 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 16/31] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (14 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 15/31] ARM: dts: aspeed: yosemite4: Remove idle state setting for yosemite4 NIC connection Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 17/31] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
` (14 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Initialize bmc gpio state
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 234 ++++++++++++++++++
1 file changed, 234 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index c0497a1aa93e..60743f9829a5 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1304,3 +1304,237 @@ &ehci1 {
&uhci {
status = "okay";
};
+
+&sgpiom0 {
+ status = "okay";
+ ngpios = <128>;
+ bus-frequency = <48000>;
+};
+
+&pinctrl {
+ pinctrl_gpio0_unbiased: gpio0_unbiased {
+ /* GPIOB0, GPIOB1 */
+ pins = "J26", "K23";
+ bias-disable;
+ };
+ pinctrl_gpio2_unbiased: gpio2_unbiased {
+ /* GPIOI5, GPIOI6, GPIOI7,
+ GPIOL6 */
+ pins = "E16", "B16", "A15", "B14";
+ bias-disable;
+ };
+ pinctrl_gpio3_unbiased: gpio3_unbiased {
+ /* GPIOM2, GPIOM3, GPIOM4, GPIOM5,
+ GPION0, GPION1, GPION2, GPION3, GPION5,
+ GPIOO0, GPIOO1, GPIOO2, GPIOO3,
+ GPIOP0, GPIOP1, GPIOP2, GPIOP3, GPIOP4, GPIOP5, GPIOP6 */
+ pins = "A12", "E14", "B12", "C12", "P25", "N23", "N25", "N24", "M23", "AD26", "AD22", "AD23", "AD24", "AB22", "W24", "AA23", "AA24", "W23", "AB23", "AB24";
+ bias-disable;
+ };
+ pinctrl_gpio4_unbiased: gpio4_unbiased {
+ /* GPIOR0, GPIOR1, GPIOR2, GPIOR3, GPIOR4, GPIOR5, GPIOR6, GPIOR7
+ GPIOS0, GPIOS1, GPIOS2, GPIOS3, GPIOS5, GPIOS6, GPIOS7 */
+ pins = "V25", "U24", "V24", "V26", "U25", "T23", "W26", "U26", "R23", "T25", "T26", "R24", "P24", "P23", "T24";
+ bias-disable;
+ };
+ pinctrl_gpio5_unbiased: gpio5_unbiased {
+ /* GPIOV0, GPIOV1, GPIOV2, GPIOV3, GPIOV4, GPIOV5, GPIOV6, GPIOV7
+ GPIOX1, GPIOX2 */
+ pins = "AB15", "AF14", "AD14", "AC15", "AE15", "AE14", "AD15", "AF15", "AA9", "AC9";
+ bias-disable;
+ };
+ pinctrl_gpio6_unbiased: gpio6_unbiased {
+ /* GPIOY2, GPIOY5, GPIOY6
+ GPIOZ0, GPIOZ1, GPIOZ3, GPIOZ4 */
+ pins = "AE11", "AF12", "AC12", "AC10", "AD10", "AB11", "AC11";
+ bias-disable;
+ };
+};
+
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_gpiu2_default &pinctrl_gpiu3_default
+ &pinctrl_gpiu4_default &pinctrl_gpiu6_default
+ &pinctrl_gpio0_unbiased &pinctrl_gpio2_unbiased
+ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
+ &pinctrl_gpio5_unbiased &pinctrl_gpio6_unbiased>;
+ gpio-line-names =
+ /*A0-A7*/ "","","","","","","","",
+ /*B0-B7*/ "FLT_HSC_SERVER_SLOT8_N","AC_ON_OFF_BTN_CPLD_SLOT5_N",
+ "PWRGD_SLOT1_STBY","PWRGD_SLOT2_STBY",
+ "PWRGD_SLOT3_STBY","PWRGD_SLOT4_STBY","","",
+ /*C0-C7*/ "","","","","FM_NIC0_WAKE_N",
+ "FM_NIC1_WAKE_N","","RST_PCIE_SLOT2_N",
+ /*D0-D7*/ "","","","","","","","",
+ /*E0-E7*/ "PRSNT_NIC1_N","PRSNT_NIC2_N","","RST_PCIE_SLOT1_N",
+ "","","","",
+ /*F0-F7*/ "FM_RESBTN_SLOT1_BMC_N","FM_RESBTN_SLOT2_BMC_N",
+ "FM_RESBTN_SLOT3_BMC_N","FM_RESBTN_SLOT4_BMC_N",
+ "PRSNT_SB_SLOT1_N","PRSNT_SB_SLOT2_N",
+ "PRSNT_SB_SLOT3_N","PRSNT_SB_SLOT4_N",
+ /*G0-G7*/ "","","","","","","","",
+ /*H0-H7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","ALT_MEDUSA_ADC_N",
+ "ALT_SMB_BMC_CPLD2_N",
+ "INT_SPIDER_ADC_R_N",
+ /*J0-J7*/ "","","","","","","","",
+ /*K0-K7*/ "","","","","","","","",
+ /*L0-L7*/ "","","","","","","ALT_MEDUSA_P12V_EFUSE_N","",
+ /*M0-M7*/ "EN_NIC0_POWER_BMC_R","EN_NIC1_POWER_BMC_R",
+ "INT_MEDUSA_IOEXP_TEMP_N","PRSNT_NIC3_N",
+ "INT_SMB_BMC_SLOT1_4_BMC_N",
+ "AC_ON_OFF_BTN_CPLD_SLOT6_N","","",
+ /*N0-N7*/ "FLT_HSC_SERVER_SLOT1_N","FLT_HSC_SERVER_SLOT2_N",
+ "FLT_HSC_SERVER_SLOT3_N","FLT_HSC_SERVER_SLOT4_N",
+ "FM_BMC_READY_R2","RST_SMB_NIC0_R_N","","",
+ /*O0-O7*/ "AC_ON_OFF_BTN_CPLD_SLOT8_N","RST_SMB_NIC1_R_N",
+ "RST_SMB_NIC2_R_N","RST_SMB_NIC3_R_N",
+ "","","","",
+ /*P0-P7*/ "ALT_SMB_BMC_CPLD1_N","BTN_BMC_R2_N",
+ "EN_P3V_BAT_SCALED_R","PWRGD_P5V_USB_BMC",
+ "FM_BMC_RTCRST_R","RST_USB_HUB_R_N",
+ "FLAG_P5V_USB_BMC_N","",
+ /*Q0-Q7*/ "AC_ON_OFF_BTN_CPLD_SLOT1_N","AC_ON_OFF_BTN_CPLD_SLOT2_N",
+ "AC_ON_OFF_BTN_CPLD_SLOT3_N","AC_ON_OFF_BTN_CPLD_SLOT4_N",
+ "PRSNT_SB_SLOT5_N","PRSNT_SB_SLOT6_N",
+ "PRSNT_SB_SLOT7_N","PRSNT_SB_SLOT8_N",
+ /*R0-R7*/ "AC_ON_OFF_BTN_CPLD_SLOT7_N","INT_SMB_BMC_SLOT5_8_BMC_N",
+ "FM_PWRBRK_NIC_BMC_R2","RST_PCIE_SLOT4_N",
+ "RST_PCIE_SLOT5_N","RST_PCIE_SLOT6_N",
+ "RST_PCIE_SLOT7_N","RST_PCIE_SLOT8_N",
+ /*S0-S7*/ "FM_NIC2_WAKE_N","FM_NIC3_WAKE_N",
+ "EN_NIC3_POWER_BMC_R","SEL_BMC_JTAG_MUX_R",
+ "","ALT_P12V_AUX_N","FAST_PROCHOT_N",
+ "SPI_WP_DISABLE_STATUS_R_N",
+ /*T0-T7*/ "","","","","","","","",
+ /*U0-U7*/ "","","RST_PCIE_SLOT3_N","",
+ "","PRSNT_NIC0_N","","",
+ /*V0-V7*/ "FM_RESBTN_SLOT5_BMC_N","FM_RESBTN_SLOT6_BMC_N",
+ "FM_RESBTN_SLOT7_BMC_N","FM_RESBTN_SLOT8_BMC_N",
+ "","","","",
+ /*W0-W7*/ "PRSNT_TPM_BMC_N","PRSNT_OCP_DEBUG_BMC_N","ALT_TEMP_BMC_N","ALT_RTC_BMC_N",
+ "","","","",
+ /*X0-X7*/ "","LT_HSC_SERVER_SLOT6_N","FLT_HSC_SERVER_SLOT7_N","","","",
+ "PWRGD_SLOT5_STBY","PWRGD_SLOT6_STBY",
+ /*Y0-Y7*/ "","","SPI_LOCK_REQ_BMC_N","PWRGD_SLOT7_STBY",
+ "","","EN_NIC2_POWER_BMC_R","",
+ /*Z0-Z7*/ "EN_P5V_USB_CPLD_R","FLT_HSC_SERVER_SLOT5_N",
+ "PWRGD_SLOT8_STBY","","","","","";
+
+ pin_gpio_b4 {
+ gpios = <ASPEED_GPIO(B, 4) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_b5 {
+ gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_f0 {
+ gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f1 {
+ gpios = <ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f2 {
+ gpios = <ASPEED_GPIO(F, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f3 {
+ gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f4 {
+ gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f5 {
+ gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f6 {
+ gpios = <ASPEED_GPIO(F, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_f7 {
+ gpios = <ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l6 {
+ gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_l7 {
+ gpios = <ASPEED_GPIO(L, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s0 {
+ gpios = <ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_s1 {
+ gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v0 {
+ gpios = <ASPEED_GPIO(V, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v1 {
+ gpios = <ASPEED_GPIO(V, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v2 {
+ gpios = <ASPEED_GPIO(V, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v3 {
+ gpios = <ASPEED_GPIO(V, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w0 {
+ gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w1 {
+ gpios = <ASPEED_GPIO(W, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w2 {
+ gpios = <ASPEED_GPIO(W, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w3 {
+ gpios = <ASPEED_GPIO(W, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w4 {
+ gpios = <ASPEED_GPIO(W, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w5 {
+ gpios = <ASPEED_GPIO(W, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w6 {
+ gpios = <ASPEED_GPIO(W, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_w7 {
+ gpios = <ASPEED_GPIO(W, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z3 {
+ gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z4 {
+ gpios = <ASPEED_GPIO(Z, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z5 {
+ gpios = <ASPEED_GPIO(Z, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 17/31] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (15 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 16/31] ARM: dts: aspeed: yosemite4: Initialize bmc gpio state Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 18/31] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
` (13 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise fan tach config for max31790 driver change
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 48 +++++++++++++++++--
1 file changed, 44 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 60743f9829a5..b46a0b9940e2 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1103,8 +1103,18 @@ adc@1f {
pwm@20{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x20>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
gpio@22{
@@ -1116,8 +1126,18 @@ gpio@22{
pwm@2f{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x2f>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
adc@33 {
@@ -1153,8 +1173,18 @@ adc@1f {
pwm@20{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x20>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
gpio@22{
@@ -1166,8 +1196,18 @@ gpio@22{
pwm@2f{
compatible = "maxim,max31790";
- pwm-as-tach = <4 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x2f>;
+ channel@4 {
+ reg = <4>;
+ sensor-type = "TACH";
+ };
+
+ channel@5 {
+ reg = <5>;
+ sensor-type = "TACH";
+ };
};
adc@33 {
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 18/31] ARM: dts: aspeed: yosemite4: add mctp config for NIC
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (16 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 17/31] ARM: dts: aspeed: yosemite4: Revise mx31790 fan tach config Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 19/31] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
` (12 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
add mctp config for NIC
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index b46a0b9940e2..7b8a2384d99d 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1281,40 +1281,64 @@ imux24: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux25: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux26: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
imux27: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
+ mctp-controller;
temperature-sensor@1f {
compatible = "ti,tmp421";
reg = <0x1f>;
};
+
+ temperature-sensor@3c {
+ compatible = "smsc,emc1403";
+ reg = <0x3c>;
+ };
};
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 19/31] ARM: dts: aspeed: yosemite4: support mux to cpld
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (17 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 18/31] ARM: dts: aspeed: yosemite4: add mctp config for NIC Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 20/31] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
` (11 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Mux pca9544 to cpld was added on EVT HW schematic design,
so add dts setting for devices behind mux pca9544 to cpld
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 64 ++++++++++++++-----
1 file changed, 49 insertions(+), 15 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 7b8a2384d99d..98eeee49b082 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -36,6 +36,10 @@ aliases {
i2c31 = &imux31;
i2c32 = &imux32;
i2c33 = &imux33;
+ i2c34 = &imux34;
+ i2c35 = &imux35;
+ i2c36 = &imux36;
+ i2c37 = &imux37;
};
chosen {
@@ -951,24 +955,54 @@ &i2c12 {
status = "okay";
bus-frequency = <400000>;
- temperature-sensor@48 {
- compatible = "ti,tmp75";
- reg = <0x48>;
- };
+ i2c-mux@70 {
+ compatible = "nxp,pca9544";
+ i2c-mux-idle-disconnect;
+ reg = <0x70>;
- eeprom@50 {
- compatible = "atmel,24c128";
- reg = <0x50>;
- };
+ imux34: i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
- eeprom@54 {
- compatible = "atmel,24c64";
- reg = <0x54>;
- };
+ temperature-sensor@48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c128";
+ reg = <0x50>;
+ };
- rtc@6f {
- compatible = "nuvoton,nct3018y";
- reg = <0x6f>;
+ eeprom@54 {
+ compatible = "atmel,24c64";
+ reg = <0x54>;
+ };
+
+ rtc@6f {
+ compatible = "nuvoton,nct3018y";
+ reg = <0x6f>;
+ };
+ };
+
+ imux35: i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux36: i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux37: i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 20/31] ARM: dts: aspeed: yosemite4: support medusa board adc sensors
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (18 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 19/31] ARM: dts: aspeed: yosemite4: support mux to cpld Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 21/31] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
` (10 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add ina233/ina28 support for medusa board adc sensors
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 98eeee49b082..49500db53a13 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -915,6 +915,19 @@ power-sensor@40 {
reg = <0x40>;
};
+ power-sensor@41 {
+ compatible = "ti,ina233";
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
+ reg = <0x41>;
+ };
+
+ power-sensor@44 {
+ compatible = "ti,ina238";
+ shunt-resistor = <1000>;
+ reg = <0x44>;
+ };
+
temperature-sensor@48 {
compatible = "ti,tmp75";
reg = <0x48>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 21/31] ARM: dts: aspeed: yosemite4: support NIC eeprom
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (19 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 20/31] ARM: dts: aspeed: yosemite4: support medusa board adc sensors Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 22/31] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
` (9 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add NIC eeprom devicetree config
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 49500db53a13..c2994651e747 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1338,6 +1338,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux25: i2c@1 {
@@ -1354,6 +1359,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux26: i2c@2 {
@@ -1370,6 +1380,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
imux27: i2c@3 {
@@ -1386,6 +1401,11 @@ temperature-sensor@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
};
};
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 22/31] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (20 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 21/31] ARM: dts: aspeed: yosemite4: support NIC eeprom Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 23/31] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
` (8 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Revise duty cycle SMB11 and SMB16 to high: 40%, low: 60%,
to meet 400kHz-i2c clock low time spec (> 1.3 us) from EE request
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index c2994651e747..c940d23c8a4b 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -761,6 +761,7 @@ eeprom@54 {
&i2c10 {
status = "okay";
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
i2c-mux@74 {
compatible = "nxp,pca9544";
i2c-mux-idle-disconnect;
@@ -1314,6 +1315,7 @@ &i2c15 {
mctp-controller;
multi-master;
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
mctp@10 {
compatible = "mctp-i2c-controller";
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 23/31] ARM: dts: aspeed: yosemite4: add fan led config
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (21 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 22/31] ARM: dts: aspeed: yosemite4: Revise i2c duty-cycle Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 24/31] ARM: dts: aspeed: yosemite4: add XDP710 Delphine CC Chiu
` (7 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Set fan led config in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 152 +++++++++++++++++-
1 file changed, 150 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index c940d23c8a4b..2f4e9c5edd5a 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -75,6 +75,154 @@ tpmdev@0 {
reg = <0>;
};
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ fan0_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan0_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan1_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan1_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan2_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 5 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan3_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 11 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan4_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan5_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan6_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 8 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan7_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 9 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan8_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan9_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio0 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan9_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio0 7 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan10_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 0 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan10_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan11_blue {
+ retain-state-shutdown;
+ default-state = "on";
+ gpios = <&led_gpio1 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ fan11_amber {
+ retain-state-shutdown;
+ default-state = "off";
+ gpios = <&led_gpio1 7 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&uart1 {
@@ -1198,7 +1346,7 @@ eeprom@52 {
reg = <0x52>;
};
- gpio@61 {
+ led_gpio0: gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
@@ -1268,7 +1416,7 @@ eeprom@52 {
reg = <0x52>;
};
- gpio@61 {
+ led_gpio1: gpio@61 {
compatible = "nxp,pca9552";
reg = <0x61>;
#address-cells = <1>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 24/31] ARM: dts: aspeed: yosemite4: add XDP710
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (22 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 23/31] ARM: dts: aspeed: yosemite4: add fan led config Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:23 ` [PATCH v14 25/31] ARM: dts: aspeed: yosemite4: add RTQ6056 support Delphine CC Chiu
` (6 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add XDP710 in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 2f4e9c5edd5a..f73719b3c2f1 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -978,11 +978,21 @@ power-sensor@10 {
reg = <0x10>;
};
+ power-sensor@11 {
+ compatible = "infineon,xdp710";
+ reg = <0x11>;
+ };
+
power-sensor@12 {
compatible = "adi,adm1272";
reg = <0x12>;
};
+ power-sensor@13 {
+ compatible = "infineon,xdp710";
+ reg = <0x13>;
+ };
+
gpio@20 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 25/31] ARM: dts: aspeed: yosemite4: add RTQ6056 support
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (23 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 24/31] ARM: dts: aspeed: yosemite4: add XDP710 Delphine CC Chiu
@ 2024-08-26 6:23 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 26/31] ARM: dts: aspeed: yosemite4: add MP5990 support Delphine CC Chiu
` (5 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:23 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add RTQ6056 (spider board 3rd source) support in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f73719b3c2f1..03a1e41312e3 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1240,35 +1240,35 @@ adc@37 {
};
power-sensor@40 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x40>;
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x41>;
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x42>;
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x43>;
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x44>;
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 26/31] ARM: dts: aspeed: yosemite4: add MP5990 support
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (24 preceding siblings ...)
2024-08-26 6:23 ` [PATCH v14 25/31] ARM: dts: aspeed: yosemite4: add RTQ6056 support Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 27/31] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver Delphine CC Chiu
` (4 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add MP5990 in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 03a1e41312e3..f139f426099e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -356,7 +356,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -402,7 +402,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -448,7 +448,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -494,7 +494,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -540,7 +540,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -586,7 +586,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -632,7 +632,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
@@ -678,7 +678,7 @@ gpio@24 {
};
power-sensor@40 {
- compatible = "adi,adm1281";
+ compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
shunt-resistor-micro-ohms = <500>;
};
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 27/31] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (25 preceding siblings ...)
2024-08-26 6:24 ` [PATCH v14 26/31] ARM: dts: aspeed: yosemite4: add MP5990 support Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 28/31] ARM: dts: aspeed: yosemite4: fix GPIO linename typo Delphine CC Chiu
` (3 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Adjust CPLD io expender for PVT stage.
Add GPIO name for GPIOO7.
Only binding MCTP driver on the down-stream port of the mux.
Remove unnecessary driver binding since there's no MCTP device before the mux.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 59 +++++++++----------
1 file changed, 29 insertions(+), 30 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index f139f426099e..abd4a9173de4 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1156,6 +1156,34 @@ rtc@6f {
compatible = "nuvoton,nct3018y";
reg = <0x6f>;
};
+
+ gpio@20 {
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@21 {
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@22 {
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio@23 {
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
imux35: i2c@1 {
@@ -1188,34 +1216,6 @@ ipmb@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
i2c-protocol;
};
-
- gpio@20 {
- compatible = "nxp,pca9506";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@21 {
- compatible = "nxp,pca9506";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@22 {
- compatible = "nxp,pca9506";
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- gpio@23 {
- compatible = "nxp,pca9506";
- reg = <0x23>;
- gpio-controller;
- #gpio-cells = <2>;
- };
};
&i2c14 {
@@ -1470,7 +1470,6 @@ adc@35 {
&i2c15 {
status = "okay";
- mctp-controller;
multi-master;
bus-frequency = <400000>;
i2c-clk-high-min-percent = <40>;
@@ -1680,7 +1679,7 @@ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
"FM_BMC_READY_R2","RST_SMB_NIC0_R_N","","",
/*O0-O7*/ "AC_ON_OFF_BTN_CPLD_SLOT8_N","RST_SMB_NIC1_R_N",
"RST_SMB_NIC2_R_N","RST_SMB_NIC3_R_N",
- "","","","",
+ "","","","FM_BMC_SLED_CYCLE_R",
/*P0-P7*/ "ALT_SMB_BMC_CPLD1_N","BTN_BMC_R2_N",
"EN_P3V_BAT_SCALED_R","PWRGD_P5V_USB_BMC",
"FM_BMC_RTCRST_R","RST_USB_HUB_R_N",
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 28/31] ARM: dts: aspeed: yosemite4: fix GPIO linename typo
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (26 preceding siblings ...)
2024-08-26 6:24 ` [PATCH v14 27/31] ARM: dts: aspeed: yosemite4: Adjust ioexp bus and remove mctp driver Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 29/31] ARM: dts: aspeed: yosemitet4: add RTQ6056 support on 11 (0x41) Delphine CC Chiu
` (2 subsequent siblings)
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Fix GPIO linename typo and add missing GPIO pin initial state.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../aspeed/aspeed-bmc-facebook-yosemite4.dts | 554 ++++++++++++++----
1 file changed, 455 insertions(+), 99 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index abd4a9173de4..4090725160f9 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -285,6 +285,8 @@ &mac2 {
pinctrl-0 = <&pinctrl_rmii3_default>;
use-ncsi;
mellanox,multi-host;
+ ncsi-ctrl,start-redo-probe;
+ ncsi-ctrl,no-channel-monitor;
};
&mac3 {
@@ -293,6 +295,8 @@ &mac3 {
pinctrl-0 = <&pinctrl_rmii4_default>;
use-ncsi;
mellanox,multi-host;
+ ncsi-ctrl,start-redo-probe;
+ ncsi-ctrl,no-channel-monitor;
};
&fmc {
@@ -327,6 +331,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -348,13 +359,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -373,6 +377,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -394,13 +405,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -419,6 +423,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -440,13 +451,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -465,6 +469,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -486,13 +497,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -511,6 +515,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -532,13 +543,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -557,6 +561,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -578,13 +589,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -603,6 +607,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -624,13 +635,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -649,6 +653,13 @@ mctp@10 {
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ gpio@24 {
+ compatible = "nxp,pca9506";
+ reg = <0x24>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
gpio@21 {
compatible = "nxp,pca9506";
reg = <0x21>;
@@ -670,13 +681,6 @@ gpio@23 {
#gpio-cells = <2>;
};
- gpio@24 {
- compatible = "nxp,pca9506";
- reg = <0x24>;
- gpio-controller;
- #gpio-cells = <2>;
- };
-
power-sensor@40 {
compatible = "adi,adm1281", "mps,mp5990";
reg = <0x40>;
@@ -687,6 +691,7 @@ power-sensor@40 {
&i2c8 {
status = "okay";
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
i2c-mux@70 {
compatible = "nxp,pca9544";
i2c-mux-idle-disconnect;
@@ -798,6 +803,7 @@ eeprom@54 {
&i2c9 {
status = "okay";
bus-frequency = <400000>;
+ i2c-clk-high-min-percent = <40>;
i2c-mux@71 {
compatible = "nxp,pca9544";
i2c-mux-idle-disconnect;
@@ -993,7 +999,7 @@ power-sensor@13 {
reg = <0x13>;
};
- gpio@20 {
+ gpio_ext1: pca9555@20 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
@@ -1012,7 +1018,7 @@ gpio@20 {
"","";
};
- gpio@21 {
+ gpio_ext2: pca9555@21 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
@@ -1031,7 +1037,7 @@ gpio@21 {
"","";
};
- gpio@22 {
+ gpio_ext3: pca9555@22 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
@@ -1050,7 +1056,7 @@ gpio@22 {
"PWRGD_P12V_AUX_0","PWRGD_P12V_AUX_1";
};
- gpio@23 {
+ gpio_ext4: pca9555@23 {
compatible = "nxp,pca9555";
pinctrl-names = "default";
gpio-controller;
@@ -1070,21 +1076,21 @@ gpio@23 {
};
power-sensor@40 {
- compatible = "mps,mp5023";
- reg = <0x40>;
+ compatible = "mps,mp5023";
+ reg = <0x40>;
};
power-sensor@41 {
- compatible = "ti,ina233";
- resistor-calibration = /bits/ 16 <0x0a00>;
- current-lsb= /bits/ 16 <0x0001>;
- reg = <0x41>;
+ compatible = "ti,ina233";
+ resistor-calibration = /bits/ 16 <0x0a00>;
+ current-lsb= /bits/ 16 <0x0001>;
+ reg = <0x41>;
};
power-sensor@44 {
- compatible = "ti,ina238";
- shunt-resistor = <1000>;
- reg = <0x44>;
+ compatible = "ti,ina238";
+ shunt-resistor = <1000>;
+ reg = <0x44>;
};
temperature-sensor@48 {
@@ -1156,33 +1162,32 @@ rtc@6f {
compatible = "nuvoton,nct3018y";
reg = <0x6f>;
};
-
gpio@20 {
- compatible = "nxp,pca9506";
- reg = <0x20>;
- gpio-controller;
- #gpio-cells = <2>;
+ compatible = "nxp,pca9506";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
gpio@21 {
- compatible = "nxp,pca9506";
- reg = <0x21>;
- gpio-controller;
- #gpio-cells = <2>;
+ compatible = "nxp,pca9506";
+ reg = <0x21>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
gpio@22 {
- compatible = "nxp,pca9506";
- reg = <0x22>;
- gpio-controller;
- #gpio-cells = <2>;
+ compatible = "nxp,pca9506";
+ reg = <0x22>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
gpio@23 {
- compatible = "nxp,pca9506";
- reg = <0x23>;
- gpio-controller;
- #gpio-cells = <2>;
+ compatible = "nxp,pca9506";
+ reg = <0x23>;
+ gpio-controller;
+ #gpio-cells = <2>;
};
};
@@ -1242,35 +1247,35 @@ adc@37 {
power-sensor@40 {
compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x40>;
- resistor-calibration = /bits/ 16 <0x0a00>;
+ resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x41>;
- resistor-calibration = /bits/ 16 <0x0a00>;
+ resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x42>;
- resistor-calibration = /bits/ 16 <0x0a00>;
+ resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x43>;
- resistor-calibration = /bits/ 16 <0x0a00>;
+ resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
compatible = "ti,ina233", "richtek,rtq6056";
reg = <0x44>;
- resistor-calibration = /bits/ 16 <0x0a00>;
+ resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
@@ -1323,6 +1328,42 @@ channel@5 {
};
};
+ hwmon0: hwmon@21 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x21>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
@@ -1330,6 +1371,42 @@ gpio@22{
#gpio-cells = <2>;
};
+ hwmon1: hwmon@23 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x23>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon0 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon0 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon0 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
pwm@2f{
compatible = "maxim,max31790";
#address-cells = <1>;
@@ -1393,6 +1470,42 @@ channel@5 {
};
};
+ hwmon2: hwmon@21 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x21>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon2 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon2 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon2 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon2 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon2 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon2 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
gpio@22{
compatible = "ti,tca6424";
reg = <0x22>;
@@ -1400,6 +1513,42 @@ gpio@22{
#gpio-cells = <2>;
};
+ hwmon3: hwmon@23 {
+ compatible = "nuvoton,nct7363";
+ reg = <0x23>;
+ #pwm-cells = <2>;
+
+ fan-3 {
+ pwms = <&hwmon3 2 20000>;
+ tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan-4 {
+ pwms = <&hwmon3 5 20000>;
+ tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan-5 {
+ pwms = <&hwmon3 5 20000>;
+ tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan-0 {
+ pwms = <&hwmon3 0 20000>;
+ tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan-1 {
+ pwms = <&hwmon3 0 20000>;
+ tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan-2 {
+ pwms = <&hwmon3 2 20000>;
+ tach-ch = /bits/ 8 <0x0e>;
+ };
+ };
+
pwm@2f{
compatible = "maxim,max31790";
#address-cells = <1>;
@@ -1493,7 +1642,7 @@ temperature-sensor@1f {
reg = <0x1f>;
};
- temperature-sensor@3c {
+ emc1403@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
@@ -1514,7 +1663,7 @@ temperature-sensor@1f {
reg = <0x1f>;
};
- temperature-sensor@3c {
+ emc1403@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
@@ -1535,7 +1684,7 @@ temperature-sensor@1f {
reg = <0x1f>;
};
- temperature-sensor@3c {
+ emc1403@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
@@ -1556,7 +1705,7 @@ temperature-sensor@1f {
reg = <0x1f>;
};
- temperature-sensor@3c {
+ emc1403@3c {
compatible = "smsc,emc1403";
reg = <0x3c>;
};
@@ -1569,6 +1718,92 @@ eeprom@50 {
};
};
+&i3c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c1_default>;
+ i3c-pp-scl-hi-period-ns = <40>;
+ i3c-pp-scl-lo-period-ns = <40>;
+ i3c-od-scl-hi-period-ns = <380>;
+ i3c-od-scl-lo-period-ns = <620>;
+ sda-tx-hold-ns = <10>;
+
+ mctp-controller;
+ hub@0x70 {
+ reg = <0x70 0x3c0 0x00700000>;
+ cp0-ldo-en = "enabled";
+ cp1-ldo-en = "enabled";
+ cp0-ldo-volt = "1.2V";
+ cp1-ldo-volt = "1.2V";
+ tp0145-ldo-en = "enabled";
+ tp2367-ldo-en = "enabled";
+ tp0145-ldo-volt = "1.2V";
+ tp2367-ldo-volt = "1.2V";
+ tp0145-pullup = "2k";
+ tp2367-pullup = "2k";
+
+ target-port@0 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@1 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@2 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@3 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ };
+};
+
+&i3c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i3c2_default>;
+ i3c-pp-scl-hi-period-ns = <40>;
+ i3c-pp-scl-lo-period-ns = <40>;
+ i3c-od-scl-hi-period-ns = <380>;
+ i3c-od-scl-lo-period-ns = <620>;
+ sda-tx-hold-ns = <10>;
+
+ mctp-controller;
+ hub@0x70 {
+ reg = <0x70 0x3c0 0x00700000>;
+ cp0-ldo-en = "enabled";
+ cp1-ldo-en = "enabled";
+ cp0-ldo-volt = "1.2V";
+ cp1-ldo-volt = "1.2V";
+ tp0145-ldo-en = "enabled";
+ tp2367-ldo-en = "enabled";
+ tp0145-ldo-volt = "1.2V";
+ tp2367-ldo-volt = "1.2V";
+ tp0145-pullup = "2k";
+ tp2367-pullup = "2k";
+
+ target-port@0 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@1 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@2 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ target-port@3 {
+ mode = "i3c";
+ pullup = "enabled";
+ };
+ };
+};
+
&adc0 {
status = "okay";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
@@ -1579,8 +1814,8 @@ &pinctrl_adc4_default &pinctrl_adc5_default
&adc1 {
status = "okay";
- pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default>
- &pinctrl_adc15_default>;
+ pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
+ &pinctrl_adc15_default>;
};
&ehci0 {
@@ -1595,6 +1830,10 @@ &uhci {
status = "okay";
};
+&jtag1 {
+ status = "okay";
+};
+
&sgpiom0 {
status = "okay";
ngpios = <128>;
@@ -1701,16 +1940,29 @@ &pinctrl_gpio3_unbiased &pinctrl_gpio4_unbiased
"","PRSNT_NIC0_N","","",
/*V0-V7*/ "FM_RESBTN_SLOT5_BMC_N","FM_RESBTN_SLOT6_BMC_N",
"FM_RESBTN_SLOT7_BMC_N","FM_RESBTN_SLOT8_BMC_N",
- "","","","",
+ "ALT_SPIDER_INA233_R_N","ALT_SPIDER_TMP75_R_N",
+ "INT_FANBOARD1_IOEXP_N","INT_FANBOARD0_IOEXP_N",
/*W0-W7*/ "PRSNT_TPM_BMC_N","PRSNT_OCP_DEBUG_BMC_N","ALT_TEMP_BMC_N","ALT_RTC_BMC_N",
"","","","",
- /*X0-X7*/ "","LT_HSC_SERVER_SLOT6_N","FLT_HSC_SERVER_SLOT7_N","","","",
+ /*X0-X7*/ "","FLT_HSC_SERVER_SLOT6_N","FLT_HSC_SERVER_SLOT7_N","","","",
"PWRGD_SLOT5_STBY","PWRGD_SLOT6_STBY",
/*Y0-Y7*/ "","","SPI_LOCK_REQ_BMC_N","PWRGD_SLOT7_STBY",
"","","EN_NIC2_POWER_BMC_R","",
/*Z0-Z7*/ "EN_P5V_USB_CPLD_R","FLT_HSC_SERVER_SLOT5_N",
"PWRGD_SLOT8_STBY","","","","","";
+ pin_gpio_b0 {
+ gpios = <ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_b2 {
+ gpios = <ASPEED_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_b3 {
+ gpios = <ASPEED_GPIO(B, 3) GPIO_ACTIVE_HIGH>;
+ input;
+ };
pin_gpio_b4 {
gpios = <ASPEED_GPIO(B, 4) GPIO_ACTIVE_HIGH>;
input;
@@ -1719,6 +1971,14 @@ pin_gpio_b5 {
gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
input;
};
+ pin_gpio_e0 {
+ gpios = <ASPEED_GPIO(E, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_e1 {
+ gpios = <ASPEED_GPIO(E, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
pin_gpio_f0 {
gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
input;
@@ -1759,6 +2019,58 @@ pin_gpio_l7 {
gpios = <ASPEED_GPIO(L, 7) GPIO_ACTIVE_LOW>;
input;
};
+ pin_gpio_m3 {
+ gpios = <ASPEED_GPIO(M, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_m4 {
+ gpios = <ASPEED_GPIO(M, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_m5 {
+ gpios = <ASPEED_GPIO(M, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_n0 {
+ gpios = <ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_n1 {
+ gpios = <ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_n2 {
+ gpios = <ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_n3 {
+ gpios = <ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_p1 {
+ gpios = <ASPEED_GPIO(P, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_q4 {
+ gpios = <ASPEED_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_q5 {
+ gpios = <ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_q6 {
+ gpios = <ASPEED_GPIO(Q, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_q7 {
+ gpios = <ASPEED_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_r1 {
+ gpios = <ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
pin_gpio_s0 {
gpios = <ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
input;
@@ -1767,6 +2079,14 @@ pin_gpio_s1 {
gpios = <ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
input;
};
+ pin_gpio_s5 {
+ gpios = <ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_u5 {
+ gpios = <ASPEED_GPIO(U, 5) GPIO_ACTIVE_LOW>;
+ input;
+ };
pin_gpio_v0 {
gpios = <ASPEED_GPIO(V, 0) GPIO_ACTIVE_LOW>;
input;
@@ -1783,6 +2103,14 @@ pin_gpio_v3 {
gpios = <ASPEED_GPIO(V, 3) GPIO_ACTIVE_LOW>;
input;
};
+ pin_gpio_v6 {
+ gpios = <ASPEED_GPIO(V, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_v7 {
+ gpios = <ASPEED_GPIO(V, 7) GPIO_ACTIVE_LOW>;
+ input;
+ };
pin_gpio_w0 {
gpios = <ASPEED_GPIO(W, 0) GPIO_ACTIVE_LOW>;
input;
@@ -1815,6 +2143,34 @@ pin_gpio_w7 {
gpios = <ASPEED_GPIO(W, 7) GPIO_ACTIVE_LOW>;
input;
};
+ pin_gpio_x1 {
+ gpios = <ASPEED_GPIO(X, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_x2 {
+ gpios = <ASPEED_GPIO(X, 2) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_x6 {
+ gpios = <ASPEED_GPIO(X, 6) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_x7 {
+ gpios = <ASPEED_GPIO(X, 7) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_y3 {
+ gpios = <ASPEED_GPIO(Y, 3) GPIO_ACTIVE_HIGH>;
+ input;
+ };
+ pin_gpio_z1 {
+ gpios = <ASPEED_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
+ input;
+ };
+ pin_gpio_z2 {
+ gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
+ input;
+ };
pin_gpio_z3 {
gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_LOW>;
input;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 29/31] ARM: dts: aspeed: yosemitet4: add RTQ6056 support on 11 (0x41).
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (27 preceding siblings ...)
2024-08-26 6:24 ` [PATCH v14 28/31] ARM: dts: aspeed: yosemite4: fix GPIO linename typo Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 30/31] ARM: dts: aspeed: yosemite4: add SQ52205 support Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 31/31] ARM: dts: aspeed: yosemite4: add GPIO I6 Delphine CC Chiu
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Ian-I-Chien, devicetree, linux-arm-kernel, linux-aspeed, linux-kernel
From: Ian-I-Chien <Ian_Chien@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 4090725160f9..d056f6d5ff6e 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1081,7 +1081,7 @@ power-sensor@40 {
};
power-sensor@41 {
- compatible = "ti,ina233";
+ compatible = "ti,ina233", "richtek,rtq6056";
resistor-calibration = /bits/ 16 <0x0a00>;
current-lsb= /bits/ 16 <0x0001>;
reg = <0x41>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 30/31] ARM: dts: aspeed: yosemite4: add SQ52205 support
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (28 preceding siblings ...)
2024-08-26 6:24 ` [PATCH v14 29/31] ARM: dts: aspeed: yosemitet4: add RTQ6056 support on 11 (0x41) Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
2024-08-26 6:24 ` [PATCH v14 31/31] ARM: dts: aspeed: yosemite4: add GPIO I6 Delphine CC Chiu
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add SQ52205 in yosemite4 DTS.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
.../boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index d056f6d5ff6e..04aa428f94b7 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -1245,35 +1245,35 @@ adc@37 {
};
power-sensor@40 {
- compatible = "ti,ina233", "richtek,rtq6056";
+ compatible = "ti,ina233", "richtek,rtq6056", "silergy,sq52205";
reg = <0x40>;
resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@41 {
- compatible = "ti,ina233", "richtek,rtq6056";
+ compatible = "ti,ina233", "richtek,rtq6056", "silergy,sq52205";
reg = <0x41>;
resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@42 {
- compatible = "ti,ina233", "richtek,rtq6056";
+ compatible = "ti,ina233", "richtek,rtq6056", "silergy,sq52205";
reg = <0x42>;
resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@43 {
- compatible = "ti,ina233", "richtek,rtq6056";
+ compatible = "ti,ina233", "richtek,rtq6056", "silergy,sq52205";
reg = <0x43>;
resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
};
power-sensor@44 {
- compatible = "ti,ina233", "richtek,rtq6056";
+ compatible = "ti,ina233", "richtek,rtq6056", "silergy,sq52205";
reg = <0x44>;
resistor-calibration = /bits/ 16 <0x0400>;
current-lsb= /bits/ 16 <0x0001>;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread* [PATCH v14 31/31] ARM: dts: aspeed: yosemite4: add GPIO I6
2024-08-26 6:23 [PATCH v14 00/31] Add i2c-mux and eeprom devices for Meta Yosemite 4 Delphine CC Chiu
` (29 preceding siblings ...)
2024-08-26 6:24 ` [PATCH v14 30/31] ARM: dts: aspeed: yosemite4: add SQ52205 support Delphine CC Chiu
@ 2024-08-26 6:24 ` Delphine CC Chiu
30 siblings, 0 replies; 32+ messages in thread
From: Delphine CC Chiu @ 2024-08-26 6:24 UTC (permalink / raw)
To: patrick, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Joel Stanley, Andrew Jeffery
Cc: Delphine CC Chiu, devicetree, linux-arm-kernel, linux-aspeed,
linux-kernel
Add BMC GPIO I6 for ALT_SMB_BMC_CPLD2_N.
Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
---
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
index 04aa428f94b7..0341b61aa1f1 100644
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-yosemite4.dts
@@ -2011,6 +2011,10 @@ pin_gpio_f7 {
gpios = <ASPEED_GPIO(F, 7) GPIO_ACTIVE_LOW>;
input;
};
+ pin_gpio_i6 {
+ gpios = <ASPEED_GPIO(I, 6) GPIO_ACTIVE_LOW>;
+ input;
+ };
pin_gpio_l6 {
gpios = <ASPEED_GPIO(L, 6) GPIO_ACTIVE_LOW>;
input;
--
2.25.1
^ permalink raw reply [flat|nested] 32+ messages in thread