* [PATCH 0/2] Add address/size properties to spi-controller nodes
@ 2024-12-18 8:03 Mihai Sain
2024-12-18 8:03 ` [PATCH 1/2] ARM: dts: microchip: sam9x60: Add address/size " Mihai Sain
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Mihai Sain @ 2024-12-18 8:03 UTC (permalink / raw)
To: nicolas.ferre, alexandre.belloni, claudiu.beznea, robh, krzk+dt,
conor+dt, linux-arm-kernel, devicetree, linux-kernel
Cc: Mihai Sain
This patch series adds common properties like address/size to spi-controller nodes.
Mihai Sain (2):
ARM: dts: microchip: sam9x60: Add address/size to spi-controller nodes
ARM: dts: microchip: sam9x7: Add address/size to spi-controller nodes
arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++
arch/arm/boot/dts/microchip/sam9x7.dtsi | 12 ++++++++++++
2 files changed, 24 insertions(+)
base-commit: aef25be35d23ec768eed08bfcf7ca3cf9685bc28
--
2.47.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] ARM: dts: microchip: sam9x60: Add address/size to spi-controller nodes
2024-12-18 8:03 [PATCH 0/2] Add address/size properties to spi-controller nodes Mihai Sain
@ 2024-12-18 8:03 ` Mihai Sain
2024-12-18 8:03 ` [PATCH 2/2] ARM: dts: microchip: sam9x7: " Mihai Sain
2024-12-19 9:06 ` [PATCH 0/2] Add address/size properties " Claudiu Beznea
2 siblings, 0 replies; 4+ messages in thread
From: Mihai Sain @ 2024-12-18 8:03 UTC (permalink / raw)
To: nicolas.ferre, alexandre.belloni, claudiu.beznea, robh, krzk+dt,
conor+dt, linux-arm-kernel, devicetree, linux-kernel
Cc: Mihai Sain
Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
---
arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi
index 36944e18a329..b8b2c1ddf3f1 100644
--- a/arch/arm/boot/dts/microchip/sam9x60.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi
@@ -197,6 +197,8 @@ spi4: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -268,6 +270,8 @@ spi5: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -768,6 +772,8 @@ spi0: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -839,6 +845,8 @@ spi1: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -910,6 +918,8 @@ spi2: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -981,6 +991,8 @@ spi3: spi@400 {
compatible = "microchip,sam9x60-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "spi_clk";
dmas = <&dma0
--
2.47.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/2] ARM: dts: microchip: sam9x7: Add address/size to spi-controller nodes
2024-12-18 8:03 [PATCH 0/2] Add address/size properties to spi-controller nodes Mihai Sain
2024-12-18 8:03 ` [PATCH 1/2] ARM: dts: microchip: sam9x60: Add address/size " Mihai Sain
@ 2024-12-18 8:03 ` Mihai Sain
2024-12-19 9:06 ` [PATCH 0/2] Add address/size properties " Claudiu Beznea
2 siblings, 0 replies; 4+ messages in thread
From: Mihai Sain @ 2024-12-18 8:03 UTC (permalink / raw)
To: nicolas.ferre, alexandre.belloni, claudiu.beznea, robh, krzk+dt,
conor+dt, linux-arm-kernel, devicetree, linux-kernel
Cc: Mihai Sain
Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
---
arch/arm/boot/dts/microchip/sam9x7.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/microchip/sam9x7.dtsi b/arch/arm/boot/dts/microchip/sam9x7.dtsi
index aedba0a8318f..b217a908f525 100644
--- a/arch/arm/boot/dts/microchip/sam9x7.dtsi
+++ b/arch/arm/boot/dts/microchip/sam9x7.dtsi
@@ -132,6 +132,8 @@ spi4: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -203,6 +205,8 @@ spi5: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -697,6 +701,8 @@ spi0: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -768,6 +774,8 @@ spi1: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -839,6 +847,8 @@ spi2: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
clock-names = "spi_clk";
dmas = <&dma0
@@ -910,6 +920,8 @@ spi3: spi@400 {
compatible = "microchip,sam9x7-spi", "atmel,at91rm9200-spi";
reg = <0x400 0x200>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
clock-names = "spi_clk";
dmas = <&dma0
--
2.47.1
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] Add address/size properties to spi-controller nodes
2024-12-18 8:03 [PATCH 0/2] Add address/size properties to spi-controller nodes Mihai Sain
2024-12-18 8:03 ` [PATCH 1/2] ARM: dts: microchip: sam9x60: Add address/size " Mihai Sain
2024-12-18 8:03 ` [PATCH 2/2] ARM: dts: microchip: sam9x7: " Mihai Sain
@ 2024-12-19 9:06 ` Claudiu Beznea
2 siblings, 0 replies; 4+ messages in thread
From: Claudiu Beznea @ 2024-12-19 9:06 UTC (permalink / raw)
To: Mihai Sain, nicolas.ferre, alexandre.belloni, robh, krzk+dt,
conor+dt, linux-arm-kernel, devicetree, linux-kernel
On 18.12.2024 10:03, Mihai Sain wrote:
> Mihai Sain (2):
> ARM: dts: microchip: sam9x60: Add address/size to spi-controller nodes
> ARM: dts: microchip: sam9x7: Add address/size to spi-controller nodes
Applied to at91-dt, thank you!
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-12-19 9:06 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2024-12-18 8:03 [PATCH 0/2] Add address/size properties to spi-controller nodes Mihai Sain
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2024-12-18 8:03 ` [PATCH 2/2] ARM: dts: microchip: sam9x7: " Mihai Sain
2024-12-19 9:06 ` [PATCH 0/2] Add address/size properties " Claudiu Beznea
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