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From: Conor Dooley <conor@kernel.org>
To: Chuanhong Guo <gch981213@gmail.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] riscv: add Siflower RISC-V SoC family Kconfig support
Date: Mon, 20 Jan 2025 18:48:49 +0000	[thread overview]
Message-ID: <20250120-skyrocket-fiftieth-5fd770df030f@spud> (raw)
In-Reply-To: <20250120022359.125952-1-gch981213@gmail.com>

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On Mon, Jan 20, 2025 at 10:23:58AM +0800, Chuanhong Guo wrote:
> Siflower RISC-V SoCs, including SF21A6826, SF21H8898 and some other
> upcomping chips, are RISC-V chips with T-Head C908 cores for home
> routers and gateways. Add a Kconfig entry named ARCH_SIFLOWER for
> them.
> Notably these chips uses ARM PL011 for UART. ARM_AMBA is selected
> for its driver.
> 
> Signed-off-by: Chuanhong Guo <gch981213@gmail.com>

This needs to be in a series with the user (your dts)

> ---
> 
> Changes since v1:
>  * removed deprecated SOC_ symbol
> 
>  arch/riscv/Kconfig.socs | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> index 1916cf7ba450..64a49e7ea03e 100644
> --- a/arch/riscv/Kconfig.socs
> +++ b/arch/riscv/Kconfig.socs
> @@ -19,6 +19,12 @@ config ARCH_SIFIVE
>  	help
>  	  This enables support for SiFive SoC platform hardware.
>  
> +config ARCH_SIFLOWER
> +	bool "Siflower RISC-V SoCs"
> +	select ARM_AMBA if TTY
> +	help
> +	  This enables support for Siflower RISC-V SoC platform hardware.
> +
>  config ARCH_SOPHGO
>  	bool "Sophgo SoCs"
>  	help
> -- 
> 2.48.1
> 
> 

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  reply	other threads:[~2025-01-20 18:48 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-20  2:23 Chuanhong Guo
2025-01-20 18:48 ` Conor Dooley [this message]
2025-01-21  1:04   ` Chuanhong Guo
2025-01-21  1:10     ` Conor Dooley

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