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From: Conor Dooley <conor@kernel.org>
To: Chuanhong Guo <gch981213@gmail.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] riscv: add Siflower RISC-V SoC family Kconfig support
Date: Tue, 21 Jan 2025 01:10:31 +0000	[thread overview]
Message-ID: <20250121-panorama-scarring-6086eb97beaa@spud> (raw)
In-Reply-To: <CAJsYDVJMSdYQ9mLhbt_-CwvfS75piT-cV+-Q5EBvh6CEeQPiJw@mail.gmail.com>

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On Tue, Jan 21, 2025 at 09:04:47AM +0800, Chuanhong Guo wrote:
> Hello!
> 
> On Tue, Jan 21, 2025 at 2:48 AM Conor Dooley <conor@kernel.org> wrote:
> >
> > On Mon, Jan 20, 2025 at 10:23:58AM +0800, Chuanhong Guo wrote:
> > > Siflower RISC-V SoCs, including SF21A6826, SF21H8898 and some other
> > > upcomping chips, are RISC-V chips with T-Head C908 cores for home
> > > routers and gateways. Add a Kconfig entry named ARCH_SIFLOWER for
> > > them.
> > > Notably these chips uses ARM PL011 for UART. ARM_AMBA is selected
> > > for its driver.
> > >
> > > Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
> >
> > This needs to be in a series with the user (your dts)
> 
> Could the user be a driver Kconfig instead? When submitting a GPIO driver I
> was suggested to not depend on architecture symbol and add soc-specific
> ones to arch/ first. [0]
> 
> I still need to polish the clock/reset driver a bit before submitting them.
> Without a clock driver I can't really submit a dts with meaningful content.
> 
> [0] https://lore.kernel.org/linux-gpio/CACRpkdYi_+aQ5L-c4=w9MK-6Uh0e9dX0nnU6LcZcHd90j97q7w@mail.gmail.com/T/#mf2352fb36ed2cb8c6574d9eb0d4c261d9346bf10

Send it with the GPIO driver then please.

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      reply	other threads:[~2025-01-21  1:10 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-20  2:23 Chuanhong Guo
2025-01-20 18:48 ` Conor Dooley
2025-01-21  1:04   ` Chuanhong Guo
2025-01-21  1:10     ` Conor Dooley [this message]

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