* [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node
@ 2025-04-05 10:55 Pengyu Luo
2025-04-07 7:21 ` neil.armstrong
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Pengyu Luo @ 2025-04-05 10:55 UTC (permalink / raw)
To: Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Conor Dooley
Cc: Pengyu Luo, linux-arm-msm, devicetree, linux-kernel
Only two little a520s share the same L2, every a720 has their own L2
cache.
Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
---
arch/arm64/boot/dts/qcom/sm8650.dtsi | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index a2b3d97ab..f47f29ec8 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -187,7 +187,7 @@ cpu3: cpu@300 {
power-domain-names = "psci";
enable-method = "psci";
- next-level-cache = <&l2_200>;
+ next-level-cache = <&l2_300>;
capacity-dmips-mhz = <1792>;
dynamic-power-coefficient = <238>;
@@ -203,6 +203,13 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
&epss_l3 SLAVE_EPSS_L3_SHARED>;
#cooling-cells = <2>;
+
+ l2_300: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ next-level-cache = <&l3_0>;
+ };
};
cpu4: cpu@400 {
--
2.49.0
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node
2025-04-05 10:55 [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node Pengyu Luo
@ 2025-04-07 7:21 ` neil.armstrong
2025-04-07 8:46 ` Konrad Dybcio
2025-05-14 21:03 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: neil.armstrong @ 2025-04-07 7:21 UTC (permalink / raw)
To: Pengyu Luo, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 05/04/2025 12:55, Pengyu Luo wrote:
> Only two little a520s share the same L2, every a720 has their own L2
> cache.
>
> Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index a2b3d97ab..f47f29ec8 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -187,7 +187,7 @@ cpu3: cpu@300 {
> power-domain-names = "psci";
>
> enable-method = "psci";
> - next-level-cache = <&l2_200>;
> + next-level-cache = <&l2_300>;
> capacity-dmips-mhz = <1792>;
> dynamic-power-coefficient = <238>;
>
> @@ -203,6 +203,13 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ACTIVE_ONLY>,
> &epss_l3 SLAVE_EPSS_L3_SHARED>;
>
> #cooling-cells = <2>;
> +
> + l2_300: l2-cache {
> + compatible = "cache";
> + cache-level = <2>;
> + cache-unified;
> + next-level-cache = <&l3_0>;
> + };
> };
>
> cpu4: cpu@400 {
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node
2025-04-05 10:55 [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node Pengyu Luo
2025-04-07 7:21 ` neil.armstrong
@ 2025-04-07 8:46 ` Konrad Dybcio
2025-05-14 21:03 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Konrad Dybcio @ 2025-04-07 8:46 UTC (permalink / raw)
To: Pengyu Luo, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, devicetree, linux-kernel
On 4/5/25 12:55 PM, Pengyu Luo wrote:
> Only two little a520s share the same L2, every a720 has their own L2
> cache.
>
> Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi")
> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Konrad
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node
2025-04-05 10:55 [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node Pengyu Luo
2025-04-07 7:21 ` neil.armstrong
2025-04-07 8:46 ` Konrad Dybcio
@ 2025-05-14 21:03 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2025-05-14 21:03 UTC (permalink / raw)
To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Pengyu Luo
Cc: linux-arm-msm, devicetree, linux-kernel
On Sat, 05 Apr 2025 18:55:28 +0800, Pengyu Luo wrote:
> Only two little a520s share the same L2, every a720 has their own L2
> cache.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: sm8650: add the missing l2 cache node
commit: 4becd72352b6861de0c24074a8502ca85080fd63
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2025-05-14 21:04 UTC | newest]
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2025-04-05 10:55 [PATCH] arm64: dts: qcom: sm8650: add the missing l2 cache node Pengyu Luo
2025-04-07 7:21 ` neil.armstrong
2025-04-07 8:46 ` Konrad Dybcio
2025-05-14 21:03 ` Bjorn Andersson
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