mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
To: <linux-kernel@vger.kernel.org>
Cc: <bp@alien8.de>, <tglx@linutronix.de>, <mingo@redhat.com>,
	<dave.hansen@linux.intel.com>, <Thomas.Lendacky@amd.com>,
	<nikunj@amd.com>, <Santosh.Shukla@amd.com>,
	<Vasant.Hegde@amd.com>, <Suravee.Suthikulpanit@amd.com>,
	<David.Kaplan@amd.com>, <x86@kernel.org>, <hpa@zytor.com>,
	<peterz@infradead.org>, <seanjc@google.com>,
	<pbonzini@redhat.com>, <kvm@vger.kernel.org>,
	<kirill.shutemov@linux.intel.com>, <huibo.wang@amd.com>,
	<naveen.rao@amd.com>, <francescolavra.fl@gmail.com>
Subject: [PATCH v5 01/20] KVM: x86: Move find_highest_vector() to a common header
Date: Tue, 29 Apr 2025 11:39:45 +0530	[thread overview]
Message-ID: <20250429061004.205839-2-Neeraj.Upadhyay@amd.com> (raw)
In-Reply-To: <20250429061004.205839-1-Neeraj.Upadhyay@amd.com>

In preparation for using find_highest_vector() in Secure AVIC
guest APIC driver, move (and rename) find_highest_vector() to
apic.h.

Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@amd.com>
---
Changes since v4:
 - No change

 arch/x86/include/asm/apic.h | 23 +++++++++++++++++++++++
 arch/x86/kvm/lapic.c        | 23 +++--------------------
 2 files changed, 26 insertions(+), 20 deletions(-)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 1c136f54651c..c63c2fe8ad13 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -500,6 +500,29 @@ static inline bool is_vector_pending(unsigned int vector)
 	return lapic_vector_set_in_irr(vector) || pi_pending_this_cpu(vector);
 }
 
+#define MAX_APIC_VECTOR			256
+#define APIC_VECTORS_PER_REG		32
+
+static inline int apic_find_highest_vector(void *bitmap)
+{
+	unsigned int regno;
+	unsigned int vec;
+	u32 *reg;
+
+	/*
+	 * The registers in the bitmap are 32-bit wide and 16-byte
+	 * aligned. State of a vector is stored in a single bit.
+	 */
+	for (regno = MAX_APIC_VECTOR / APIC_VECTORS_PER_REG - 1; regno >= 0; regno--) {
+		vec = regno * APIC_VECTORS_PER_REG;
+		reg = bitmap + regno * 16;
+		if (*reg)
+			return __fls(*reg) + vec;
+	}
+
+	return -1;
+}
+
 /*
  * Warm reset vector position:
  */
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 28e3317124fd..775eb742d110 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -27,6 +27,7 @@
 #include <linux/export.h>
 #include <linux/math64.h>
 #include <linux/slab.h>
+#include <asm/apic.h>
 #include <asm/processor.h>
 #include <asm/mce.h>
 #include <asm/msr.h>
@@ -55,9 +56,6 @@
 /* 14 is the version for Xeon and Pentium 8.4.8*/
 #define APIC_VERSION			0x14UL
 #define LAPIC_MMIO_LENGTH		(1 << 12)
-/* followed define is not in apicdef.h */
-#define MAX_APIC_VECTOR			256
-#define APIC_VECTORS_PER_REG		32
 
 /*
  * Enable local APIC timer advancement (tscdeadline mode only) with adaptive
@@ -626,21 +624,6 @@ static const unsigned int apic_lvt_mask[KVM_APIC_MAX_NR_LVT_ENTRIES] = {
 	[LVT_CMCI] = LVT_MASK | APIC_MODE_MASK
 };
 
-static int find_highest_vector(void *bitmap)
-{
-	int vec;
-	u32 *reg;
-
-	for (vec = MAX_APIC_VECTOR - APIC_VECTORS_PER_REG;
-	     vec >= 0; vec -= APIC_VECTORS_PER_REG) {
-		reg = bitmap + REG_POS(vec);
-		if (*reg)
-			return __fls(*reg) + vec;
-	}
-
-	return -1;
-}
-
 static u8 count_vectors(void *bitmap)
 {
 	int vec;
@@ -704,7 +687,7 @@ EXPORT_SYMBOL_GPL(kvm_apic_update_irr);
 
 static inline int apic_search_irr(struct kvm_lapic *apic)
 {
-	return find_highest_vector(apic->regs + APIC_IRR);
+	return apic_find_highest_vector(apic->regs + APIC_IRR);
 }
 
 static inline int apic_find_highest_irr(struct kvm_lapic *apic)
@@ -779,7 +762,7 @@ static inline int apic_find_highest_isr(struct kvm_lapic *apic)
 	if (likely(apic->highest_isr_cache != -1))
 		return apic->highest_isr_cache;
 
-	result = find_highest_vector(apic->regs + APIC_ISR);
+	result = apic_find_highest_vector(apic->regs + APIC_ISR);
 	ASSERT(result == -1 || result >= 16);
 
 	return result;
-- 
2.34.1


  reply	other threads:[~2025-04-29  6:10 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-29  6:09 [PATCH v5 00/20] AMD: Add Secure AVIC Guest Support Neeraj Upadhyay
2025-04-29  6:09 ` Neeraj Upadhyay [this message]
2025-04-29 14:42   ` [PATCH v5 01/20] KVM: x86: Move find_highest_vector() to a common header Sean Christopherson
2025-04-29 18:09     ` Neeraj Upadhyay
2025-05-07 10:38       ` Borislav Petkov
2025-05-07 11:39         ` Neeraj Upadhyay
2025-06-10  6:32     ` Neeraj Upadhyay
2025-06-10 16:12       ` Sean Christopherson
2025-04-29  6:09 ` [PATCH v5 02/20] x86: apic: Move apic_update_irq_cfg() calls to apic_update_vector() Neeraj Upadhyay
2025-05-07  8:08   ` Thomas Gleixner
2025-04-29  6:09 ` [PATCH v5 03/20] x86/apic: Add new driver for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 04/20] x86/apic: Initialize Secure AVIC APIC backing page Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 05/20] x86/apic: Populate .read()/.write() callbacks of Secure AVIC driver Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 06/20] x86/apic: Initialize APIC ID for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 07/20] x86/apic: Add update_vector() callback for apic drivers Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 08/20] x86/apic: Add update_vector() callback for Secure AVIC Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 09/20] x86/apic: Add support to send IPI " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 10/20] x86/apic: Support LAPIC timer " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 11/20] x86/sev: Initialize VGIF for secondary VCPUs " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 12/20] x86/apic: Add support to send NMI IPI " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 13/20] x86/apic: Allow NMI to be injected from hypervisor " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 14/20] x86/sev: Enable NMI support " Neeraj Upadhyay
2025-04-29  6:09 ` [PATCH v5 15/20] x86/apic: Read and write LVT* APIC registers from HV for SAVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 16/20] x86/apic: Handle EOI writes for Secure AVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 17/20] x86/apic: Add kexec support for Secure AVIC Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 18/20] x86/apic: Enable Secure AVIC in Control MSR Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 19/20] x86/sev: Prevent SECURE_AVIC_CONTROL MSR interception for Secure AVIC guests Neeraj Upadhyay
2025-04-29  6:10 ` [PATCH v5 20/20] x86/sev: Indicate SEV-SNP guest supports Secure AVIC Neeraj Upadhyay

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250429061004.205839-2-Neeraj.Upadhyay@amd.com \
    --to=neeraj.upadhyay@amd.com \
    --cc=David.Kaplan@amd.com \
    --cc=Santosh.Shukla@amd.com \
    --cc=Suravee.Suthikulpanit@amd.com \
    --cc=Thomas.Lendacky@amd.com \
    --cc=Vasant.Hegde@amd.com \
    --cc=bp@alien8.de \
    --cc=dave.hansen@linux.intel.com \
    --cc=francescolavra.fl@gmail.com \
    --cc=hpa@zytor.com \
    --cc=huibo.wang@amd.com \
    --cc=kirill.shutemov@linux.intel.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mingo@redhat.com \
    --cc=naveen.rao@amd.com \
    --cc=nikunj@amd.com \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=seanjc@google.com \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®