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From: Devarsh Thakkar <devarsht@ti.com>
To: <jyri.sarha@iki.fi>, <tomi.valkeinen@ideasonboard.com>,
	<airlied@gmail.com>, <maarten.lankhorst@linux.intel.com>,
	<mripard@kernel.org>, <tzimmermann@suse.de>,
	<dri-devel@lists.freedesktop.org>, <simona@ffwll.ch>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <praneeth@ti.com>, <vigneshr@ti.com>, <aradhya.bhatia@linux.dev>,
	<s-jain1@ti.com>, <r-donadkar@ti.com>, <j-choudhary@ti.com>,
	<h-shenoy@ti.com>, <devarsht@ti.com>
Subject: [PATCH v5 0/3] Add support for AM62L DSS
Date: Tue, 29 Apr 2025 20:06:53 +0530	[thread overview]
Message-ID: <20250429143656.3252877-1-devarsht@ti.com> (raw)

This adds support for DSS subsystem present in TI's AM62L SoC
which supports single display pipeline with DPI output which
is also routed to DSI Tx controller within the SoC.

Change Log:
V5:
- Use hw_id instead of index for places where it was missed
  so that we pick correct base address for vid region

V4:
- Update vid_info struct to keep hw_id and instantiate
  only for actually existing pipes

V3:
- Make generic infra to support truncated K3 DSS IP's
- Remove AM62A updates from AM62L DT binding updates

V2:
- Fix incorrect format of compatible string (comma instead of
  hyphen) for AM62L SoC
- Use separate register space and helper functions for AM62L
  due to minor differences in register offset/bit position differences
  for first plane

Rangediff:
V4->V5:
- https://gist.github.com/devarsht/a0e6aa7b1c19f47facd0058962e3c3c2

V3->V4:
- https://gist.github.com/devarsht/1e75c9e1ac0cdfc01703a0776e31e782

V2->V3:
- https://gist.github.com/devarsht/24fa8dd2986861efa431352d19ebbb41

V1->V2
- https://gist.github.com/devarsht/11d47f25ca9fea6976e6284330ddf443

Links to previous versions:
V4: https://lore.kernel.org/all/20250326145736.3659670-1-devarsht@ti.com/
V3: https://lore.kernel.org/all/20250306132914.1469387-1-devarsht@ti.com/
V2: https://lore.kernel.org/all/20250204061552.3720261-1-devarsht@ti.com/
V1: https://lore.kernel.org/all/20241231090432.3649158-1-devarsht@ti.com/

Test logs:
https://gist.github.com/devarsht/82505ca69f0bd5d9788bfc240d2e83d4

Devarsh Thakkar (3):
  dt-bindings: display: ti,am65x-dss: Add support for AM62L DSS
  drm/tidss: Update infrastructure to support K3 DSS cut-down versions
  drm/tidss: Add support for AM62L display subsystem

 .../bindings/display/ti/ti,am65x-dss.yaml     |  21 +-
 drivers/gpu/drm/tidss/tidss_crtc.c            |  11 +-
 drivers/gpu/drm/tidss/tidss_dispc.c           | 193 ++++++++++++++----
 drivers/gpu/drm/tidss/tidss_dispc.h           |  13 +-
 drivers/gpu/drm/tidss/tidss_drv.c             |   1 +
 drivers/gpu/drm/tidss/tidss_kms.c             |   2 +-
 drivers/gpu/drm/tidss/tidss_plane.c           |   2 +-
 7 files changed, 195 insertions(+), 48 deletions(-)

-- 
2.39.1


             reply	other threads:[~2025-04-29 14:37 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-29 14:36 Devarsh Thakkar [this message]
2025-04-29 14:36 ` [PATCH v5 1/3] dt-bindings: display: ti,am65x-dss: " Devarsh Thakkar
2025-04-29 14:36 ` [PATCH v5 2/3] drm/tidss: Update infrastructure to support K3 DSS cut-down versions Devarsh Thakkar
2025-04-30 13:14   ` Tomi Valkeinen
2025-04-30 16:37     ` Devarsh Thakkar
2025-04-30 17:42       ` Tomi Valkeinen
2025-05-02  7:06         ` Devarsh Thakkar
2025-05-02  8:07           ` Tomi Valkeinen
2025-05-02 10:47             ` Devarsh Thakkar
2025-05-02 10:55               ` Tomi Valkeinen
2025-05-02 11:52                 ` Devarsh Thakkar
2025-05-03  8:44                   ` Tomi Valkeinen
2025-05-05  7:49                     ` Devarsh Thakkar
2025-05-05  8:06                       ` Tomi Valkeinen
2025-04-29 14:36 ` [PATCH v5 3/3] drm/tidss: Add support for AM62L display subsystem Devarsh Thakkar

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