From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
dri-devel@lists.freedesktop.org,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Subject: Re: [PATCH v5 01/12] dt-bindings: display: renesas,rzg2l-du: Add support for RZ/V2H(P) SoC
Date: Tue, 20 May 2025 15:52:06 +0200 [thread overview]
Message-ID: <20250520135206.GA13321@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20250512182330.238259-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi Prabhakar,
Thank you for the patch.
On Mon, May 12, 2025 at 07:23:19PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> The DU block on the RZ/V2H(P) SoC is identical to the one found on the
> RZ/G2L SoC. However, it only supports the DSI interface, whereas the
> RZ/G2L supports both DSI and DPI interfaces.
>
> Due to this difference, a SoC-specific compatible string
> 'renesas,r9a09g057-du' is added for the RZ/V2H(P) SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> v4->v5:
> - Added reviewed tag from Biju
>
> v3->v4:
> - No changes
>
> v2->v3:
> - Collected reviewed tag from Krzysztof
>
> v1->v2:
> - Kept the sort order for schema validation
> - Added `port@1: false` for RZ/V2H(P) SoC
> ---
> .../bindings/display/renesas,rzg2l-du.yaml | 23 ++++++++++++++++++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> index 95e3d5e74b87..1e32d14b6edb 100644
> --- a/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> +++ b/Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
> @@ -20,6 +20,7 @@ properties:
> - enum:
> - renesas,r9a07g043u-du # RZ/G2UL
> - renesas,r9a07g044-du # RZ/G2{L,LC}
> + - renesas,r9a09g057-du # RZ/V2H(P)
> - items:
> - enum:
> - renesas,r9a07g054-du # RZ/V2L
> @@ -101,7 +102,12 @@ allOf:
>
> required:
> - port@0
> - else:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a07g044-du
> + then:
> properties:
> ports:
> properties:
> @@ -113,6 +119,21 @@ allOf:
> required:
> - port@0
> - port@1
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: renesas,r9a09g057-du
> + then:
> + properties:
> + ports:
> + properties:
> + port@0:
> + description: DSI
> + port@1: false
> +
> + required:
> + - port@0
>
> examples:
> # RZ/G2L DU
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2025-05-20 13:52 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 18:23 [PATCH v5 00/12] Add DU " Prabhakar
2025-05-12 18:23 ` [PATCH v5 01/12] dt-bindings: display: renesas,rzg2l-du: Add " Prabhakar
2025-05-20 13:52 ` Laurent Pinchart [this message]
2025-05-12 18:23 ` [PATCH v5 02/12] drm: renesas: rz-du: " Prabhakar
2025-05-20 13:56 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 03/12] drm: renesas: rz-du: mipi_dsi: Add min check for VCLK range Prabhakar
2025-05-20 13:58 ` Laurent Pinchart
2025-05-21 13:01 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 04/12] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation Prabhakar
2025-05-20 14:05 ` Laurent Pinchart
2025-05-21 13:03 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 05/12] drm: renesas: rz-du: mipi_dsi: Use VCLK for " Prabhakar
2025-05-20 14:16 ` Laurent Pinchart
2025-05-21 13:05 ` Lad, Prabhakar
2025-05-21 13:09 ` Biju Das
2025-05-20 14:54 ` Geert Uytterhoeven
2025-05-21 13:06 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 06/12] drm: renesas: rz-du: mipi_dsi: Add OF data support Prabhakar
2025-05-20 14:22 ` Laurent Pinchart
2025-05-21 13:08 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 07/12] drm: renesas: rz-du: mipi_dsi: Make "rst" reset control optional for RZ/V2H(P) Prabhakar
2025-05-12 19:28 ` Biju Das
2025-05-20 14:26 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 08/12] drm: renesas: rz-du: mipi_dsi: Use mHz for D-PHY frequency calculations Prabhakar
2025-05-20 14:24 ` Laurent Pinchart
2025-05-21 11:02 ` Fabrizio Castro
2025-05-12 18:23 ` [PATCH v5 09/12] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support Prabhakar
2025-05-20 14:26 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 10/12] drm: renesas: rz-du: mipi_dsi: Add dphy_late_init() callback for RZ/V2H(P) Prabhakar
2025-05-20 14:28 ` Laurent Pinchart
2025-05-21 13:10 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 11/12] drm: renesas: rz-du: mipi_dsi: Add function pointers for configuring VCLK and mode validation Prabhakar
2025-05-12 18:23 ` [PATCH v5 12/12] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling Prabhakar
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250520135206.GA13321@pendragon.ideasonboard.com \
--to=laurent.pinchart@ideasonboard.com \
--cc=airlied@gmail.com \
--cc=biju.das.jz@bp.renesas.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=fabrizio.castro.jz@renesas.com \
--cc=geert+renesas@glider.be \
--cc=krzk+dt@kernel.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=maarten.lankhorst@linux.intel.com \
--cc=magnus.damm@gmail.com \
--cc=mripard@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=prabhakar.csengg@gmail.com \
--cc=prabhakar.mahadev-lad.rj@bp.renesas.com \
--cc=robh@kernel.org \
--cc=simona@ffwll.ch \
--cc=tzimmermann@suse.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®