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From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	dri-devel@lists.freedesktop.org,
	linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v5 09/12] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support
Date: Tue, 20 May 2025 16:26:02 +0200	[thread overview]
Message-ID: <20250520142602.GH13321@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20250512182330.238259-10-prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi Prabhakar,

Thank you for the patch.

On Mon, May 12, 2025 at 07:23:27PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Introduce the `RZ_MIPI_DSI_FEATURE_16BPP` flag in `rzg2l_mipi_dsi_hw_info`
> to indicate support for 16BPP pixel formats. The RZ/V2H(P) SoC supports
> 16BPP, whereas this feature is missing on the RZ/G2L SoC.
> 
> Update the `mipi_dsi_host_attach()` function to check this flag before
> allowing 16BPP formats. If the SoC does not support 16BPP, return an error
> to prevent incorrect format selection.
> 
> This change enables finer-grained format support control for different
> SoC variants.
> 
> Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

> ---
> v4->v5:
> - Updated RZ_MIPI_DSI_FEATURE_16BPP macro to use BIT(0)
> - Added Reviewed tag from Biju
> 
> v3->v4:
> - No changes
> 
> v2->v3:
> - No changes
> 
> v1->v2:
> - Renamed RZ_MIPI_DSI_FEATURE_16BPP
> ---
>  drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index f93519613662..55a1c1b043c8 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -28,6 +28,8 @@
>  
>  #include "rzg2l_mipi_dsi_regs.h"
>  
> +#define RZ_MIPI_DSI_FEATURE_16BPP	BIT(0)
> +
>  struct rzg2l_mipi_dsi;
>  
>  struct rzg2l_mipi_dsi_hw_info {
> @@ -37,6 +39,7 @@ struct rzg2l_mipi_dsi_hw_info {
>  	u32 link_reg_offset;
>  	unsigned long max_dclk;
>  	unsigned long min_dclk;
> +	u8 features;
>  };
>  
>  struct rzg2l_mipi_dsi {
> @@ -643,8 +646,16 @@ static int rzg2l_mipi_dsi_host_attach(struct mipi_dsi_host *host,
>  
>  	switch (mipi_dsi_pixel_format_to_bpp(device->format)) {
>  	case 24:
> +		break;
>  	case 18:
>  		break;
> +	case 16:
> +		if (!(dsi->info->features & RZ_MIPI_DSI_FEATURE_16BPP)) {
> +			dev_err(dsi->dev, "Unsupported format 0x%04x\n",
> +				device->format);
> +			return -EINVAL;
> +		}
> +		break;
>  	default:
>  		dev_err(dsi->dev, "Unsupported format 0x%04x\n", device->format);
>  		return -EINVAL;

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2025-05-20 14:26 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-12 18:23 [PATCH v5 00/12] Add DU support for RZ/V2H(P) SoC Prabhakar
2025-05-12 18:23 ` [PATCH v5 01/12] dt-bindings: display: renesas,rzg2l-du: Add " Prabhakar
2025-05-20 13:52   ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 02/12] drm: renesas: rz-du: " Prabhakar
2025-05-20 13:56   ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 03/12] drm: renesas: rz-du: mipi_dsi: Add min check for VCLK range Prabhakar
2025-05-20 13:58   ` Laurent Pinchart
2025-05-21 13:01     ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 04/12] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation Prabhakar
2025-05-20 14:05   ` Laurent Pinchart
2025-05-21 13:03     ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 05/12] drm: renesas: rz-du: mipi_dsi: Use VCLK for " Prabhakar
2025-05-20 14:16   ` Laurent Pinchart
2025-05-21 13:05     ` Lad, Prabhakar
2025-05-21 13:09       ` Biju Das
2025-05-20 14:54   ` Geert Uytterhoeven
2025-05-21 13:06     ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 06/12] drm: renesas: rz-du: mipi_dsi: Add OF data support Prabhakar
2025-05-20 14:22   ` Laurent Pinchart
2025-05-21 13:08     ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 07/12] drm: renesas: rz-du: mipi_dsi: Make "rst" reset control optional for RZ/V2H(P) Prabhakar
2025-05-12 19:28   ` Biju Das
2025-05-20 14:26   ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 08/12] drm: renesas: rz-du: mipi_dsi: Use mHz for D-PHY frequency calculations Prabhakar
2025-05-20 14:24   ` Laurent Pinchart
2025-05-21 11:02     ` Fabrizio Castro
2025-05-12 18:23 ` [PATCH v5 09/12] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support Prabhakar
2025-05-20 14:26   ` Laurent Pinchart [this message]
2025-05-12 18:23 ` [PATCH v5 10/12] drm: renesas: rz-du: mipi_dsi: Add dphy_late_init() callback for RZ/V2H(P) Prabhakar
2025-05-20 14:28   ` Laurent Pinchart
2025-05-21 13:10     ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 11/12] drm: renesas: rz-du: mipi_dsi: Add function pointers for configuring VCLK and mode validation Prabhakar
2025-05-12 18:23 ` [PATCH v5 12/12] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling Prabhakar

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