From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Prabhakar <prabhakar.csengg@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
dri-devel@lists.freedesktop.org,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v5 02/12] drm: renesas: rz-du: Add support for RZ/V2H(P) SoC
Date: Tue, 20 May 2025 15:56:19 +0200 [thread overview]
Message-ID: <20250520135619.GB13321@pendragon.ideasonboard.com> (raw)
In-Reply-To: <20250512182330.238259-3-prabhakar.mahadev-lad.rj@bp.renesas.com>
Hi Prabhakar,
Thank you for the patch.
On Mon, May 12, 2025 at 07:23:20PM +0100, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> The LCD controller (LCDC) on the RZ/V2H(P) SoC is composed of Frame
> Compression Processor (FCPVD), Video Signal Processor (VSPD), and
> Display Unit (DU).
>
> There is one LCDC unit available on the RZ/V2H(P) SoC which is connected
> to the DSI.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
> v4->v5:
> - Added reviewed tag from Biju
>
> v3->v4:
> - No changes
>
> v2->v3:
> - No changes
>
> v1->v2:
> - No changes
> ---
> drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
> index 5e40f0c1e7b0..e1aa6a719529 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
> @@ -50,9 +50,20 @@ static const struct rzg2l_du_device_info rzg2l_du_r9a07g044_info = {
> }
> };
>
> +static const struct rzg2l_du_device_info rzg2l_du_r9a09g057_info = {
> + .channels_mask = BIT(0),
> + .routes = {
> + [RZG2L_DU_OUTPUT_DSI0] = {
> + .possible_outputs = BIT(0),
> + .port = 0,
> + },
> + },
> +};
> +
> static const struct of_device_id rzg2l_du_of_table[] = {
> { .compatible = "renesas,r9a07g043u-du", .data = &rzg2l_du_r9a07g043u_info },
> { .compatible = "renesas,r9a07g044-du", .data = &rzg2l_du_r9a07g044_info },
> + { .compatible = "renesas,r9a09g057-du", .data = &rzg2l_du_r9a09g057_info },
> { /* sentinel */ }
> };
>
--
Regards,
Laurent Pinchart
next prev parent reply other threads:[~2025-05-20 13:56 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-12 18:23 [PATCH v5 00/12] Add DU " Prabhakar
2025-05-12 18:23 ` [PATCH v5 01/12] dt-bindings: display: renesas,rzg2l-du: Add " Prabhakar
2025-05-20 13:52 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 02/12] drm: renesas: rz-du: " Prabhakar
2025-05-20 13:56 ` Laurent Pinchart [this message]
2025-05-12 18:23 ` [PATCH v5 03/12] drm: renesas: rz-du: mipi_dsi: Add min check for VCLK range Prabhakar
2025-05-20 13:58 ` Laurent Pinchart
2025-05-21 13:01 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 04/12] drm: renesas: rz-du: mipi_dsi: Simplify HSFREQ calculation Prabhakar
2025-05-20 14:05 ` Laurent Pinchart
2025-05-21 13:03 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 05/12] drm: renesas: rz-du: mipi_dsi: Use VCLK for " Prabhakar
2025-05-20 14:16 ` Laurent Pinchart
2025-05-21 13:05 ` Lad, Prabhakar
2025-05-21 13:09 ` Biju Das
2025-05-20 14:54 ` Geert Uytterhoeven
2025-05-21 13:06 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 06/12] drm: renesas: rz-du: mipi_dsi: Add OF data support Prabhakar
2025-05-20 14:22 ` Laurent Pinchart
2025-05-21 13:08 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 07/12] drm: renesas: rz-du: mipi_dsi: Make "rst" reset control optional for RZ/V2H(P) Prabhakar
2025-05-12 19:28 ` Biju Das
2025-05-20 14:26 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 08/12] drm: renesas: rz-du: mipi_dsi: Use mHz for D-PHY frequency calculations Prabhakar
2025-05-20 14:24 ` Laurent Pinchart
2025-05-21 11:02 ` Fabrizio Castro
2025-05-12 18:23 ` [PATCH v5 09/12] drm: renesas: rz-du: mipi_dsi: Add feature flag for 16BPP support Prabhakar
2025-05-20 14:26 ` Laurent Pinchart
2025-05-12 18:23 ` [PATCH v5 10/12] drm: renesas: rz-du: mipi_dsi: Add dphy_late_init() callback for RZ/V2H(P) Prabhakar
2025-05-20 14:28 ` Laurent Pinchart
2025-05-21 13:10 ` Lad, Prabhakar
2025-05-12 18:23 ` [PATCH v5 11/12] drm: renesas: rz-du: mipi_dsi: Add function pointers for configuring VCLK and mode validation Prabhakar
2025-05-12 18:23 ` [PATCH v5 12/12] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling Prabhakar
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