[PATCH v2 4/6] misc: amd-sbi: CPUID/MCAMSR protocol for Revision 0x21

[Akshay Gupta <akshay.gupta@amd.com>]

- CPUID and MCAMSR protocol for newer platform with revision
  0x21 and later is modified as per two byte register address size.
- Modify the CPUID and MCAMSR protocol to return error, "-EOPNOTSUPP",
  for revision 0x21.
- Next set of patches will add support for CPUID and MCAMSR for Turin and
  later platforms.

Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
---
Changes since v1:
 - New patch
 drivers/misc/amd-sbi/rmi-core.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/amd-sbi/rmi-core.c b/drivers/misc/amd-sbi/rmi-core.c
index 3dec2fc00124..bf534ba757db 100644
--- a/drivers/misc/amd-sbi/rmi-core.c
+++ b/drivers/misc/amd-sbi/rmi-core.c
@@ -122,8 +122,8 @@ static int rmi_cpuid_read(struct sbrmi_data *data,
 		if (ret < 0)
 			goto exit_unlock;
 	}
-	/* CPUID protocol for REV 0x10 is not supported*/
-	if (data->rev == 0x10) {
+	/* CPUID protocol for REV 0x20 is only supported*/
+	if (data->rev != 0x20) {
 		ret = -EOPNOTSUPP;
 		goto exit_unlock;
 	}
@@ -203,8 +203,8 @@ static int rmi_mca_msr_read(struct sbrmi_data *data,
 		if (ret < 0)
 			goto exit_unlock;
 	}
-	/* MCA MSR protocol for REV 0x10 is not supported*/
-	if (data->rev == 0x10) {
+	/* MCA MSR protocol for REV 0x20 is supported*/
+	if (data->rev != 0x20) {
 		ret = -EOPNOTSUPP;
 		goto exit_unlock;
 	}
-- 
2.25.1