[PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Jessica Zhang]

Since 3D merge allows for larger modes to be supported across 2 layer
mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
supported.

Reported-by: Abel Vesa <abel.vesa@linaro.org>
Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
---
Changes in v2:
- Divide adjusted mode clock by 2 if 3d merge enabled (Dmitry)
- Link to v1: https://lore.kernel.org/r/20250922-modeclk-fix-v1-1-a9b8faec74f8@oss.qualcomm.com
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 4b970a59deaf..2f8156051d9b 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -1545,6 +1545,9 @@ static enum drm_mode_status dpu_crtc_mode_valid(struct drm_crtc *crtc,
 	adjusted_mode_clk = dpu_core_perf_adjusted_mode_clk(mode->clock,
 							    dpu_kms->perf.perf_cfg);
 
+	if (dpu_kms->catalog->caps->has_3d_merge)
+		adjusted_mode_clk /= 2;
+
 	/*
 	 * The given mode, adjusted for the perf clock factor, should not exceed
 	 * the max core clock rate

---
base-commit: b5bad77e1e3c7249e4c0c88f98477e1ee7669b63
change-id: 20250922-modeclk-fix-a870375d9960

Best regards,
--  
Jessica Zhang <jessica.zhang@oss.qualcomm.com>

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Dmitry Baryshkov]

On Tue, Sep 23, 2025 at 04:03:50PM -0700, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
> 
> Reported-by: Abel Vesa <abel.vesa@linaro.org>
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> ---
> Changes in v2:
> - Divide adjusted mode clock by 2 if 3d merge enabled (Dmitry)
> - Link to v1: https://lore.kernel.org/r/20250922-modeclk-fix-v1-1-a9b8faec74f8@oss.qualcomm.com
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 +++
>  1 file changed, 3 insertions(+)
> 

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>


-- 
With best wishes
Dmitry

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Abel Vesa]

On 25-09-23 16:03:50, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
> 
> Reported-by: Abel Vesa <abel.vesa@linaro.org>
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>

Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Dmitry Baryshkov]

On Thu, Sep 25, 2025 at 09:51:28AM +0300, Abel Vesa wrote:
> On 25-09-23 16:03:50, Jessica Zhang wrote:
> > Since 3D merge allows for larger modes to be supported across 2 layer
> > mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> > supported.
> > 
> > Reported-by: Abel Vesa <abel.vesa@linaro.org>
> > Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> > Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> 
> Reviewed-by: Abel Vesa <abel.vesa@linaro.org>

Is it also a T-B? ;-)


-- 
With best wishes
Dmitry

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Abel Vesa]

On 25-09-26 01:22:07, Dmitry Baryshkov wrote:
> On Thu, Sep 25, 2025 at 09:51:28AM +0300, Abel Vesa wrote:
> > On 25-09-23 16:03:50, Jessica Zhang wrote:
> > > Since 3D merge allows for larger modes to be supported across 2 layer
> > > mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> > > supported.
> > > 
> > > Reported-by: Abel Vesa <abel.vesa@linaro.org>
> > > Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> > > Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> > 
> > Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
> 
> Is it also a T-B? ;-)

It will be, by the end of the day. 

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Abel Vesa]

On 25-09-23 16:03:50, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
> 
> Reported-by: Abel Vesa <abel.vesa@linaro.org>
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>

Tested on Glymur CRD with yesterday's -next as base.

Tested-by: Abel Vesa <abel.vesa@linaro.org>

Thanks,
Abel

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Krzysztof Kozlowski]

On 24/09/2025 01:03, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
> 
> Reported-by: Abel Vesa <abel.vesa@linaro.org>
> Fixes: 62b7d6835288 ("drm/msm/dpu: Filter modes based on adjusted mode clock")
> Signed-off-by: Jessica Zhang <jessica.zhang@oss.qualcomm.com>
> ---
> Changes in v2:

Fixes display on SM8750 MTP:


Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

Re: [PATCH v2] drm/msm/dpu: Fix adjusted mode clock check for 3d merge

[Dmitry Baryshkov]

On Tue, 23 Sep 2025 16:03:50 -0700, Jessica Zhang wrote:
> Since 3D merge allows for larger modes to be supported across 2 layer
> mixers, filter modes based on adjusted mode clock / 2 when 3d merge is
> supported.
> 
> 

Applied, thanks!

[1/1] drm/msm/dpu: Fix adjusted mode clock check for 3d merge
      https://gitlab.freedesktop.org/lumag/msm/-/commit/f5d079564c44

Best regards,
-- 
With best wishes
Dmitry