From: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
To: linux-kernel@vger.kernel.org, aiqun.yu@oss.qualcomm.com,
tingwei.zhang@oss.qualcomm.com, trilok.soni@oss.qualcomm.com,
yijie.yang@oss.qualcomm.com,
Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Cc: Taniya Das <taniya.das@oss.qualcomm.com>
Subject: [PATCH 2/2] arm64: defconfig: Enable Kaanapali clock controllers
Date: Wed, 24 Sep 2025 17:05:35 -0700 [thread overview]
Message-ID: <20250924-knp-config-v1-2-e2cf83b1932e@oss.qualcomm.com> (raw)
In-Reply-To: <20250924-knp-config-v1-0-e2cf83b1932e@oss.qualcomm.com>
From: Taniya Das <taniya.das@oss.qualcomm.com>
Enable the Kaanapali display, video, camera and gpu clock controller
for their respective functionalities on the Qualcomm Kaanapali platform.
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
arch/arm64/configs/defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index a3767e2ce02d..e67e8ad323de 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1364,7 +1364,11 @@ CONFIG_COMMON_CLK_MT8192_SCP_ADSP=y
CONFIG_COMMON_CLK_MT8192_VDECSYS=y
CONFIG_COMMON_CLK_MT8192_VENCSYS=y
CONFIG_COMMON_CLK_QCOM=y
+CONFIG_CLK_KAANAPALI_CAMCC=y
+CONFIG_CLK_KAANAPALI_DISPCC=y
CONFIG_CLK_KAANAPALI_GCC=y
+CONFIG_CLK_KAANAPALI_GPUCC=y
+CONFIG_CLK_KAANAPALI_VIDEOCC=y
CONFIG_CLK_X1E80100_CAMCC=m
CONFIG_CLK_X1E80100_DISPCC=m
CONFIG_CLK_X1E80100_GCC=y
--
2.25.1
next prev parent reply other threads:[~2025-09-25 0:05 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 0:05 [PATCH 0/2] arm64: defconfig: Add support for Kaanapali SoC Jingyi Wang
2025-09-25 0:05 ` [PATCH 1/2] arm64: defconfig: enable GCC, interconnect and pinctrl for Kaanapali Jingyi Wang
2025-10-10 0:56 ` Krzysztof Kozlowski
2025-09-25 0:05 ` Jingyi Wang [this message]
2025-10-10 0:57 ` [PATCH 2/2] arm64: defconfig: Enable Kaanapali clock controllers Krzysztof Kozlowski
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