* [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely}
@ 2025-10-10 23:35 Vivian Wang
2025-10-10 23:35 ` [PATCH v3 1/5] riscv: pgtable: Use __riscv_has_extension_unlikely Vivian Wang
` (6 more replies)
0 siblings, 7 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
There are about a dozen uses of asm goto in arch/riscv just to select
between two code paths with the alternative mechanism. Convert them to
the existing helpers __riscv_has_extension_{likely,unlikely}.
In each case, I have preserved the existing code's choice of asm goto
pattern while picking between "likely" and "unlikely", namely:
ALTERNATIVE("j %l[no]", "nop", ...) -> "likely"
ALTERNATIVE("nop", "j %l[yes]", ...) -> "unlikely"
Since the helpers are just implementations of these patterns, the
performance should be the same as before.
These patches are also available at:
https://github.com/dramforever/linux/tree/riscv/altn-helper/v2
---
Changes in v3:
- Rebased on riscv for-next
- Resolve conflict, use ALT_RISCV_PAUSE() in moved lines
- Link to v2: https://lore.kernel.org/r/20250821-riscv-altn-helper-wip-v2-0-9586fa702f78@iscas.ac.cn
Changes in v2:
- Cc'd authors who initially introduced the asm goto blocks
- Use existing __riscv_has_extension_{likely,unlikely} instead
- Remove bogus comment for Zbb being likely (checksum)
- Restructured patch to minimize diff (bitops, hweight, cmpxchg)
- Link to v1: https://lore.kernel.org/r/20250820-riscv-altn-helper-wip-v1-0-c3c626c1f7e6@iscas.ac.cn
---
Vivian Wang (5):
riscv: pgtable: Use __riscv_has_extension_unlikely
riscv: checksum: Use __riscv_has_extension_likely
riscv: hweight: Use __riscv_has_extension_likely
riscv: bitops: Use __riscv_has_extension_likely
riscv: cmpxchg: Use __riscv_has_extension_likely
arch/riscv/include/asm/arch_hweight.h | 24 ++++++----------
arch/riscv/include/asm/bitops.h | 32 ++++++---------------
arch/riscv/include/asm/checksum.h | 13 +++------
arch/riscv/include/asm/cmpxchg.h | 12 +++-----
arch/riscv/include/asm/pgtable.h | 15 +++++-----
arch/riscv/lib/csum.c | 53 ++++++++---------------------------
arch/riscv/mm/pgtable.c | 22 +++++++--------
7 files changed, 53 insertions(+), 118 deletions(-)
---
base-commit: cd5a0afbdf8033dc83786315d63f8b325bdba2fd
change-id: 20250820-riscv-altn-helper-wip-00af3a552c37
Best regards,
--
Vivian "dramforever" Wang
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 1/5] riscv: pgtable: Use __riscv_has_extension_unlikely
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
@ 2025-10-10 23:35 ` Vivian Wang
2025-10-10 23:35 ` [PATCH v3 2/5] riscv: checksum: Use __riscv_has_extension_likely Vivian Wang
` (5 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
Use __riscv_has_extension_unlikely() to check for RISCV_ISA_EXT_SVVPTC,
replacing the use of asm goto with ALTERNATIVE.
The "unlikely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("nop", "j %l[svvptc]", ...).
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
arch/riscv/include/asm/pgtable.h | 15 +++++++--------
arch/riscv/mm/pgtable.c | 22 ++++++++++------------
2 files changed, 17 insertions(+), 20 deletions(-)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index 29e994a9afb67c638173d4a2475fdfbd91bee967..02f37322eb83a113b411e95e153fecc5c20319ad 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -496,8 +496,13 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,
struct vm_area_struct *vma, unsigned long address,
pte_t *ptep, unsigned int nr)
{
- asm goto(ALTERNATIVE("nop", "j %l[svvptc]", 0, RISCV_ISA_EXT_SVVPTC, 1)
- : : : : svvptc);
+ /*
+ * Svvptc guarantees that the new valid pte will be visible within
+ * a bounded timeframe, so when the uarch does not cache invalid
+ * entries, we don't have to do anything.
+ */
+ if (__riscv_has_extension_unlikely(0, RISCV_ISA_EXT_SVVPTC))
+ return;
/*
* The kernel assumes that TLBs don't cache invalid entries, but
@@ -509,12 +514,6 @@ static inline void update_mmu_cache_range(struct vm_fault *vmf,
while (nr--)
local_flush_tlb_page(address + nr * PAGE_SIZE);
-svvptc:;
- /*
- * Svvptc guarantees that the new valid pte will be visible within
- * a bounded timeframe, so when the uarch does not cache invalid
- * entries, we don't have to do anything.
- */
}
#define update_mmu_cache(vma, addr, ptep) \
update_mmu_cache_range(NULL, vma, addr, ptep, 1)
diff --git a/arch/riscv/mm/pgtable.c b/arch/riscv/mm/pgtable.c
index 8b6c0a112a8db4e91de54c3bd3bd527a605a6197..289ca6fa6b4de80d42287d28e266a0a8d3848cff 100644
--- a/arch/riscv/mm/pgtable.c
+++ b/arch/riscv/mm/pgtable.c
@@ -9,8 +9,16 @@ int ptep_set_access_flags(struct vm_area_struct *vma,
unsigned long address, pte_t *ptep,
pte_t entry, int dirty)
{
- asm goto(ALTERNATIVE("nop", "j %l[svvptc]", 0, RISCV_ISA_EXT_SVVPTC, 1)
- : : : : svvptc);
+ if (__riscv_has_extension_unlikely(0, RISCV_ISA_EXT_SVVPTC)) {
+ if (!pte_same(ptep_get(ptep), entry)) {
+ __set_pte_at(vma->vm_mm, ptep, entry);
+ /* Here only not svadu is impacted */
+ flush_tlb_page(vma, address);
+ return true;
+ }
+
+ return false;
+ }
if (!pte_same(ptep_get(ptep), entry))
__set_pte_at(vma->vm_mm, ptep, entry);
@@ -19,16 +27,6 @@ int ptep_set_access_flags(struct vm_area_struct *vma,
* the case that the PTE changed and the spurious fault case.
*/
return true;
-
-svvptc:
- if (!pte_same(ptep_get(ptep), entry)) {
- __set_pte_at(vma->vm_mm, ptep, entry);
- /* Here only not svadu is impacted */
- flush_tlb_page(vma, address);
- return true;
- }
-
- return false;
}
int ptep_test_and_clear_young(struct vm_area_struct *vma,
--
2.50.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 2/5] riscv: checksum: Use __riscv_has_extension_likely
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
2025-10-10 23:35 ` [PATCH v3 1/5] riscv: pgtable: Use __riscv_has_extension_unlikely Vivian Wang
@ 2025-10-10 23:35 ` Vivian Wang
2025-10-10 23:35 ` [PATCH v3 3/5] riscv: hweight: " Vivian Wang
` (4 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
Use __riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB,
replacing the use of asm goto with ALTERNATIVE.
The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[no_zbb]", "nop", ...).
While we're at it, also remove bogus comment about Zbb being likely
available. We have to choose between "likely" and "unlikely" due to
limitations of the asm goto feature, but that does not mean we should
put a bad comment on why we pick "likely" over "unlikely".
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
arch/riscv/include/asm/checksum.h | 13 +++-------
arch/riscv/lib/csum.c | 53 +++++++++------------------------------
2 files changed, 16 insertions(+), 50 deletions(-)
diff --git a/arch/riscv/include/asm/checksum.h b/arch/riscv/include/asm/checksum.h
index da378856f1d590e22271b90e803c7e55e8dd22e3..70eb50173fb6ab636f9e1534ce2ba58de5ee5c54 100644
--- a/arch/riscv/include/asm/checksum.h
+++ b/arch/riscv/include/asm/checksum.h
@@ -49,16 +49,11 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
* ZBB only saves three instructions on 32-bit and five on 64-bit so not
* worth checking if supported without Alternatives.
*/
- if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) {
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)) {
unsigned long fold_temp;
- asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- :
- :
- :
- : no_zbb);
-
if (IS_ENABLED(CONFIG_32BIT)) {
asm(".option push \n\
.option arch,+zbb \n\
@@ -81,7 +76,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
}
return (__force __sum16)(csum >> 16);
}
-no_zbb:
+
#ifndef CONFIG_32BIT
csum += ror64(csum, 32);
csum >>= 32;
diff --git a/arch/riscv/lib/csum.c b/arch/riscv/lib/csum.c
index 9408f50ca59a8901f7cfbcf3297d1492172c6ea2..420e9eb93e8531bb988823e46f23b0bbb7ca0afb 100644
--- a/arch/riscv/lib/csum.c
+++ b/arch/riscv/lib/csum.c
@@ -40,20 +40,11 @@ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
uproto = (__force unsigned int)htonl(proto);
sum += uproto;
- if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) {
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)) {
unsigned long fold_temp;
- /*
- * Zbb is likely available when the kernel is compiled with Zbb
- * support, so nop when Zbb is available and jump when Zbb is
- * not available.
- */
- asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- :
- :
- :
- : no_zbb);
asm(".option push \n\
.option arch,+zbb \n\
rori %[fold_temp], %[sum], 32 \n\
@@ -66,7 +57,7 @@ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
: [sum] "+r" (sum), [fold_temp] "=&r" (fold_temp));
return (__force __sum16)(sum >> 16);
}
-no_zbb:
+
sum += ror64(sum, 32);
sum >>= 32;
return csum_fold((__force __wsum)sum);
@@ -152,21 +143,11 @@ do_csum_with_alignment(const unsigned char *buff, int len)
csum = do_csum_common(ptr, end, data);
#ifdef CC_HAS_ASM_GOTO_TIED_OUTPUT
- if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) {
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)) {
unsigned long fold_temp;
- /*
- * Zbb is likely available when the kernel is compiled with Zbb
- * support, so nop when Zbb is available and jump when Zbb is
- * not available.
- */
- asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- :
- :
- :
- : no_zbb);
-
#ifdef CONFIG_32BIT
asm_goto_output(".option push \n\
.option arch,+zbb \n\
@@ -204,7 +185,7 @@ do_csum_with_alignment(const unsigned char *buff, int len)
end:
return csum >> 16;
}
-no_zbb:
+
#endif /* CC_HAS_ASM_GOTO_TIED_OUTPUT */
#ifndef CONFIG_32BIT
csum += ror64(csum, 32);
@@ -234,21 +215,11 @@ do_csum_no_alignment(const unsigned char *buff, int len)
end = (const unsigned long *)(buff + len);
csum = do_csum_common(ptr, end, data);
- if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) {
+ if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)) {
unsigned long fold_temp;
- /*
- * Zbb is likely available when the kernel is compiled with Zbb
- * support, so nop when Zbb is available and jump when Zbb is
- * not available.
- */
- asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- :
- :
- :
- : no_zbb);
-
#ifdef CONFIG_32BIT
asm (".option push \n\
.option arch,+zbb \n\
@@ -274,7 +245,7 @@ do_csum_no_alignment(const unsigned char *buff, int len)
#endif /* !CONFIG_32BIT */
return csum >> 16;
}
-no_zbb:
+
#ifndef CONFIG_32BIT
csum += ror64(csum, 32);
csum >>= 32;
--
2.50.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 3/5] riscv: hweight: Use __riscv_has_extension_likely
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
2025-10-10 23:35 ` [PATCH v3 1/5] riscv: pgtable: Use __riscv_has_extension_unlikely Vivian Wang
2025-10-10 23:35 ` [PATCH v3 2/5] riscv: checksum: Use __riscv_has_extension_likely Vivian Wang
@ 2025-10-10 23:35 ` Vivian Wang
2025-10-10 23:35 ` [PATCH v3 4/5] riscv: bitops: " Vivian Wang
` (3 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
Use __riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB,
replacing the use of asm goto with ALTERNATIVE.
The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[legacy]", "nop", ...).
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
arch/riscv/include/asm/arch_hweight.h | 24 ++++++++----------------
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/arch/riscv/include/asm/arch_hweight.h b/arch/riscv/include/asm/arch_hweight.h
index 0e7cdbbec8efd3c293da2fa96a8c6d0a93faf56f..021bc671de299d604a33301e68c10cb1c28ad2c1 100644
--- a/arch/riscv/include/asm/arch_hweight.h
+++ b/arch/riscv/include/asm/arch_hweight.h
@@ -19,10 +19,10 @@
static __always_inline unsigned int __arch_hweight32(unsigned int w)
{
-#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)))
+ return __sw_hweight32(w);
asm (".option push\n"
".option arch,+zbb\n"
@@ -31,10 +31,6 @@ static __always_inline unsigned int __arch_hweight32(unsigned int w)
: "=r" (w) : "r" (w) :);
return w;
-
-legacy:
-#endif
- return __sw_hweight32(w);
}
static inline unsigned int __arch_hweight16(unsigned int w)
@@ -50,10 +46,10 @@ static inline unsigned int __arch_hweight8(unsigned int w)
#if BITS_PER_LONG == 64
static __always_inline unsigned long __arch_hweight64(__u64 w)
{
-#if defined(CONFIG_RISCV_ISA_ZBB) && defined(CONFIG_TOOLCHAIN_HAS_ZBB)
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!(IS_ENABLED(CONFIG_RISCV_ISA_ZBB) &&
+ IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) &&
+ __riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB)))
+ return __sw_hweight64(w);
asm (".option push\n"
".option arch,+zbb\n"
@@ -62,10 +58,6 @@ static __always_inline unsigned long __arch_hweight64(__u64 w)
: "=r" (w) : "r" (w) :);
return w;
-
-legacy:
-#endif
- return __sw_hweight64(w);
}
#else /* BITS_PER_LONG == 64 */
static inline unsigned long __arch_hweight64(__u64 w)
--
2.50.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 4/5] riscv: bitops: Use __riscv_has_extension_likely
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
` (2 preceding siblings ...)
2025-10-10 23:35 ` [PATCH v3 3/5] riscv: hweight: " Vivian Wang
@ 2025-10-10 23:35 ` Vivian Wang
2025-10-10 23:35 ` [PATCH v3 5/5] riscv: cmpxchg: " Vivian Wang
` (2 subsequent siblings)
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
Use __riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB,
replacing the use of asm goto with ALTERNATIVE.
The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[legacy]", "nop", ...).
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
arch/riscv/include/asm/bitops.h | 32 ++++++++------------------------
1 file changed, 8 insertions(+), 24 deletions(-)
diff --git a/arch/riscv/include/asm/bitops.h b/arch/riscv/include/asm/bitops.h
index 77880677b06e03875721f33515a6d2ac9166c373..d566747a341bb2e04a63eb5455656fd73585bc55 100644
--- a/arch/riscv/include/asm/bitops.h
+++ b/arch/riscv/include/asm/bitops.h
@@ -47,9 +47,8 @@
static __always_inline __attribute_const__ unsigned long variable__ffs(unsigned long word)
{
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB))
+ return generic___ffs(word);
asm volatile (".option push\n"
".option arch,+zbb\n"
@@ -58,9 +57,6 @@ static __always_inline __attribute_const__ unsigned long variable__ffs(unsigned
: "=r" (word) : "r" (word) :);
return word;
-
-legacy:
- return generic___ffs(word);
}
/**
@@ -76,9 +72,8 @@ static __always_inline __attribute_const__ unsigned long variable__ffs(unsigned
static __always_inline __attribute_const__ unsigned long variable__fls(unsigned long word)
{
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB))
+ return generic___fls(word);
asm volatile (".option push\n"
".option arch,+zbb\n"
@@ -87,9 +82,6 @@ static __always_inline __attribute_const__ unsigned long variable__fls(unsigned
: "=r" (word) : "r" (word) :);
return BITS_PER_LONG - 1 - word;
-
-legacy:
- return generic___fls(word);
}
/**
@@ -105,9 +97,8 @@ static __always_inline __attribute_const__ unsigned long variable__fls(unsigned
static __always_inline __attribute_const__ int variable_ffs(int x)
{
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB))
+ return generic_ffs(x);
if (!x)
return 0;
@@ -119,9 +110,6 @@ static __always_inline __attribute_const__ int variable_ffs(int x)
: "=r" (x) : "r" (x) :);
return x + 1;
-
-legacy:
- return generic_ffs(x);
}
/**
@@ -137,9 +125,8 @@ static __always_inline __attribute_const__ int variable_ffs(int x)
static __always_inline int variable_fls(unsigned int x)
{
- asm goto(ALTERNATIVE("j %l[legacy]", "nop", 0,
- RISCV_ISA_EXT_ZBB, 1)
- : : : : legacy);
+ if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZBB))
+ return generic_fls(x);
if (!x)
return 0;
@@ -151,9 +138,6 @@ static __always_inline int variable_fls(unsigned int x)
: "=r" (x) : "r" (x) :);
return 32 - x;
-
-legacy:
- return generic_fls(x);
}
/**
--
2.50.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 5/5] riscv: cmpxchg: Use __riscv_has_extension_likely
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
` (3 preceding siblings ...)
2025-10-10 23:35 ` [PATCH v3 4/5] riscv: bitops: " Vivian Wang
@ 2025-10-10 23:35 ` Vivian Wang
2025-10-10 23:38 ` [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
2025-10-11 11:28 ` Conor Dooley
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:35 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
Vivian Wang, linux-riscv, linux-kernel
Use __riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZAWRS,
replacing the use of asm goto with ALTERNATIVE.
The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[no_zawrs]", "nop", ...).
Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
---
arch/riscv/include/asm/cmpxchg.h | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/riscv/include/asm/cmpxchg.h b/arch/riscv/include/asm/cmpxchg.h
index 122e1485d39a0ad44ec4357cb23148dc6e58dc6b..6fca79f5c3475cc03745e481f964d2899373235b 100644
--- a/arch/riscv/include/asm/cmpxchg.h
+++ b/arch/riscv/include/asm/cmpxchg.h
@@ -373,9 +373,10 @@ static __always_inline void __cmpwait(volatile void *ptr,
u32 *__ptr32b;
ulong __s, __val, __mask;
- asm goto(ALTERNATIVE("j %l[no_zawrs]", "nop",
- 0, RISCV_ISA_EXT_ZAWRS, 1)
- : : : : no_zawrs);
+ if (!__riscv_has_extension_likely(0, RISCV_ISA_EXT_ZAWRS)) {
+ ALT_RISCV_PAUSE();
+ return;
+ }
switch (size) {
case 1:
@@ -437,11 +438,6 @@ static __always_inline void __cmpwait(volatile void *ptr,
default:
BUILD_BUG();
}
-
- return;
-
-no_zawrs:
- ALT_RISCV_PAUSE();
}
#define __cmpwait_relaxed(ptr, val) \
--
2.50.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely}
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
` (4 preceding siblings ...)
2025-10-10 23:35 ` [PATCH v3 5/5] riscv: cmpxchg: " Vivian Wang
@ 2025-10-10 23:38 ` Vivian Wang
2025-10-11 11:28 ` Conor Dooley
6 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-10 23:38 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley
Cc: Charlie Jenkins, Xiao Wang, Christoph Müllner, Vivian Wang,
linux-riscv, linux-kernel
On 10/11/25 07:35, Vivian Wang wrote:
> There are about a dozen uses of asm goto in arch/riscv just to select
> between two code paths with the alternative mechanism. Convert them to
> the existing helpers __riscv_has_extension_{likely,unlikely}.
>
> In each case, I have preserved the existing code's choice of asm goto
> pattern while picking between "likely" and "unlikely", namely:
>
> ALTERNATIVE("j %l[no]", "nop", ...) -> "likely"
> ALTERNATIVE("nop", "j %l[yes]", ...) -> "unlikely"
>
> Since the helpers are just implementations of these patterns, the
> performance should be the same as before.
>
> These patches are also available at:
>
> https://github.com/dramforever/linux/tree/riscv/altn-helper/v2
I made a mistake while writing the cover letter, the correct link is:
https://github.com/dramforever/linux/tree/riscv/altn-helper/v3
Vivian "dramforever" Wang
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely}
2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
` (5 preceding siblings ...)
2025-10-10 23:38 ` [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
@ 2025-10-11 11:28 ` Conor Dooley
2025-10-11 22:21 ` Vivian Wang
6 siblings, 1 reply; 9+ messages in thread
From: Conor Dooley @ 2025-10-11 11:28 UTC (permalink / raw)
To: Vivian Wang
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley, Charlie Jenkins,
Xiao Wang, Christoph Müllner, Vivian Wang, linux-riscv,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 2813 bytes --]
On Sat, Oct 11, 2025 at 07:35:42AM +0800, Vivian Wang wrote:
> There are about a dozen uses of asm goto in arch/riscv just to select
> between two code paths with the alternative mechanism. Convert them to
> the existing helpers __riscv_has_extension_{likely,unlikely}.
>
> In each case, I have preserved the existing code's choice of asm goto
> pattern while picking between "likely" and "unlikely", namely:
>
> ALTERNATIVE("j %l[no]", "nop", ...) -> "likely"
> ALTERNATIVE("nop", "j %l[yes]", ...) -> "unlikely"
>
> Since the helpers are just implementations of these patterns, the
> performance should be the same as before.
Can you explain why you're opting for the __ variant, instead of the one
without __? They should do the same thing in your cases, and resolve to
the alternative, since the non-alternative function call will be
unreachable and the assert is compiletime. There's currently no users of
the __ prefixed versions outside of other extension detection helpers, and
I think it should probably be kept that way if possible.
>
> These patches are also available at:
>
> https://github.com/dramforever/linux/tree/riscv/altn-helper/v2
>
> ---
> Changes in v3:
> - Rebased on riscv for-next
> - Resolve conflict, use ALT_RISCV_PAUSE() in moved lines
> - Link to v2: https://lore.kernel.org/r/20250821-riscv-altn-helper-wip-v2-0-9586fa702f78@iscas.ac.cn
>
> Changes in v2:
> - Cc'd authors who initially introduced the asm goto blocks
> - Use existing __riscv_has_extension_{likely,unlikely} instead
> - Remove bogus comment for Zbb being likely (checksum)
> - Restructured patch to minimize diff (bitops, hweight, cmpxchg)
> - Link to v1: https://lore.kernel.org/r/20250820-riscv-altn-helper-wip-v1-0-c3c626c1f7e6@iscas.ac.cn
>
> ---
> Vivian Wang (5):
> riscv: pgtable: Use __riscv_has_extension_unlikely
> riscv: checksum: Use __riscv_has_extension_likely
> riscv: hweight: Use __riscv_has_extension_likely
> riscv: bitops: Use __riscv_has_extension_likely
> riscv: cmpxchg: Use __riscv_has_extension_likely
>
> arch/riscv/include/asm/arch_hweight.h | 24 ++++++----------
> arch/riscv/include/asm/bitops.h | 32 ++++++---------------
> arch/riscv/include/asm/checksum.h | 13 +++------
> arch/riscv/include/asm/cmpxchg.h | 12 +++-----
> arch/riscv/include/asm/pgtable.h | 15 +++++-----
> arch/riscv/lib/csum.c | 53 ++++++++---------------------------
> arch/riscv/mm/pgtable.c | 22 +++++++--------
> 7 files changed, 53 insertions(+), 118 deletions(-)
> ---
> base-commit: cd5a0afbdf8033dc83786315d63f8b325bdba2fd
> change-id: 20250820-riscv-altn-helper-wip-00af3a552c37
>
> Best regards,
> --
> Vivian "dramforever" Wang
>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely}
2025-10-11 11:28 ` Conor Dooley
@ 2025-10-11 22:21 ` Vivian Wang
0 siblings, 0 replies; 9+ messages in thread
From: Vivian Wang @ 2025-10-11 22:21 UTC (permalink / raw)
To: Conor Dooley
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Alexandre Ghiti,
Yury Norov, Rasmus Villemoes, Paul Walmsley, Charlie Jenkins,
Xiao Wang, Christoph Müllner, linux-riscv, linux-kernel
On 10/11/25 19:28, Conor Dooley wrote:
> On Sat, Oct 11, 2025 at 07:35:42AM +0800, Vivian Wang wrote:
>> There are about a dozen uses of asm goto in arch/riscv just to select
>> between two code paths with the alternative mechanism. Convert them to
>> the existing helpers __riscv_has_extension_{likely,unlikely}.
>>
>> In each case, I have preserved the existing code's choice of asm goto
>> pattern while picking between "likely" and "unlikely", namely:
>>
>> ALTERNATIVE("j %l[no]", "nop", ...) -> "likely"
>> ALTERNATIVE("nop", "j %l[yes]", ...) -> "unlikely"
>>
>> Since the helpers are just implementations of these patterns, the
>> performance should be the same as before.
> Can you explain why you're opting for the __ variant, instead of the one
> without __? They should do the same thing in your cases, and resolve to
> the alternative, since the non-alternative function call will be
> unreachable and the assert is compiletime. There's currently no users of
> the __ prefixed versions outside of other extension detection helpers, and
> I think it should probably be kept that way if possible.
I agree that it's preferable to use the non-__ functions. I'll do that
in the next version.
The only real reason I had used the __ versions is so that it would be
equivalent to existing code, although as you said these should be
equivalent since the uses are already guarded behind.
The "pgtable" code currently isn't guarded behind CONFIG_ALTERNATIVE,
although now that I think about it, it should actually be preferable to
do a runtime check than to do a TLB cleaning, so that one should
probably be non-__ as well.
Thanks,
Vivian "dramforever" Wang
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2025-10-11 22:21 UTC | newest]
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2025-10-10 23:35 [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
2025-10-10 23:35 ` [PATCH v3 1/5] riscv: pgtable: Use __riscv_has_extension_unlikely Vivian Wang
2025-10-10 23:35 ` [PATCH v3 2/5] riscv: checksum: Use __riscv_has_extension_likely Vivian Wang
2025-10-10 23:35 ` [PATCH v3 3/5] riscv: hweight: " Vivian Wang
2025-10-10 23:35 ` [PATCH v3 4/5] riscv: bitops: " Vivian Wang
2025-10-10 23:35 ` [PATCH v3 5/5] riscv: cmpxchg: " Vivian Wang
2025-10-10 23:38 ` [PATCH v3 0/5] riscv: Use __riscv_has_extension_{likely,unlikely} Vivian Wang
2025-10-11 11:28 ` Conor Dooley
2025-10-11 22:21 ` Vivian Wang
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