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From: Hugo Villeneuve <hugo@hugovil.com>
To: Biju <biju.das.au@gmail.com>
Cc: Biju Das <biju.das.jz@bp.renesas.com>,
	Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
	Maxime Ripard <mripard@kernel.org>,
	Thomas Zimmermann <tzimmermann@suse.de>,
	David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
	dri-devel@lists.freedesktop.org,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Chris Brandt <chris.brandt@renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/2] drm: renesas: rzg2l_mipi_dsi: Use fsleep() for 1ms delay in D-PHY init
Date: Tue, 17 Mar 2026 10:47:19 -0400	[thread overview]
Message-ID: <20260317104719.e251fb0feb2e99b7569c2dc4@hugovil.com> (raw)
In-Reply-To: <20260317123610.329630-2-biju.das.jz@bp.renesas.com>

Hi Biju,

On Tue, 17 Mar 2026 12:36:00 +0000
Biju <biju.das.au@gmail.com> wrote:

> From: Biju Das <biju.das.jz@bp.renesas.com>

The commit message seems confusing to me, indicating that you only
changed fsleep, but did not change the delay? Maybe change it to
indicate that you increase the delay from 1us to 1ms, which is the real
reason of the change (why).

> 
> Replace udelay(1) with fsleep(1000) in rzg2l_mipi_dsi_dphy_init() to

Same here, the real reason of the change is to increase the delay, and
this is not obviously stated.


> follow the power-on sequence described in Figure 34.5 of section
> "34.4.2.1 Reset" of the RZ/G2L hardware manual Rev.1.50 May 2025.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> index a87a301326c7..e53b48e4de56 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -528,7 +528,7 @@ static int rzg2l_mipi_dsi_dphy_init(struct rzg2l_mipi_dsi *dsi,
>  	if (ret < 0)
>  		return ret;
>  
> -	udelay(1);
> +	fsleep(1000);
>  
>  	return 0;
>  }
> -- 
> 2.43.0
> 
> 


-- 
Hugo Villeneuve <hugo@hugovil.com>

  reply	other threads:[~2026-03-17 15:05 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-17 12:35 [PATCH 0/2] Improvements on RZ/G2L MIPI DSI driver Biju
2026-03-17 12:36 ` [PATCH 1/2] drm: renesas: rzg2l_mipi_dsi: Use fsleep() for 1ms delay in D-PHY init Biju
2026-03-17 14:47   ` Hugo Villeneuve [this message]
2026-03-17 15:01     ` Biju Das
2026-03-17 15:02   ` Hugo Villeneuve
2026-03-17 15:15     ` Biju Das
2026-03-17 12:36 ` [PATCH 2/2] drm: renesas: rzg2l_mipi_dsi: Fix the power-on sequence Biju
2026-03-17 15:01   ` Hugo Villeneuve
2026-03-17 15:13     ` Biju Das
2026-03-17 15:20       ` Hugo Villeneuve
2026-03-17 15:45         ` Biju Das
2026-03-17 16:12           ` Hugo Villeneuve
2026-03-17 16:36             ` Biju Das
2026-03-17 18:52               ` Hugo Villeneuve
2026-03-17 19:37                 ` Biju Das
2026-03-17 19:49                   ` Hugo Villeneuve
2026-03-17 20:10                     ` Biju Das
2026-03-17 20:45                       ` Biju Das
2026-03-17 20:54                       ` Hugo Villeneuve
2026-03-17 16:04   ` Tommaso Merciai
2026-03-17 16:16     ` Biju Das
2026-03-17 16:36       ` Tommaso Merciai

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