* [PATCH] LoongArch: Align FPU register state to 32 bytes
@ 2026-03-30 9:48 Lisa Robinson
2026-04-11 13:10 ` Huacai Chen
0 siblings, 1 reply; 5+ messages in thread
From: Lisa Robinson @ 2026-03-30 9:48 UTC (permalink / raw)
To: Huacai Chen, WANG Xuerui; +Cc: loongarch, linux-kernel, Lisa Robinson
Move fpr to the beginning of struct loongarch_fpu so it is naturally
aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
switch performance.
Signed-off-by: Lisa Robinson <lisa@bytefly.space>
---
arch/loongarch/include/asm/processor.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
index c3bc44b5f5b3..ce8b953f8c79 100644
--- a/arch/loongarch/include/asm/processor.h
+++ b/arch/loongarch/include/asm/processor.h
@@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
BUILD_FPR_ACCESS(64)
struct loongarch_fpu {
+ union fpureg fpr[NUM_FPU_REGS];
uint64_t fcc; /* 8x8 */
uint32_t fcsr;
uint32_t ftop;
- union fpureg fpr[NUM_FPU_REGS];
};
struct loongarch_lbt {
--
2.53.0
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
2026-03-30 9:48 [PATCH] LoongArch: Align FPU register state to 32 bytes Lisa Robinson
@ 2026-04-11 13:10 ` Huacai Chen
2026-04-14 8:20 ` Huacai Chen
0 siblings, 1 reply; 5+ messages in thread
From: Huacai Chen @ 2026-04-11 13:10 UTC (permalink / raw)
To: Lisa Robinson; +Cc: WANG Xuerui, loongarch, linux-kernel
Applied, thanks.
Huacai
On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
>
> Move fpr to the beginning of struct loongarch_fpu so it is naturally
> aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> switch performance.
>
> Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> ---
> arch/loongarch/include/asm/processor.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> index c3bc44b5f5b3..ce8b953f8c79 100644
> --- a/arch/loongarch/include/asm/processor.h
> +++ b/arch/loongarch/include/asm/processor.h
> @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> BUILD_FPR_ACCESS(64)
>
> struct loongarch_fpu {
> + union fpureg fpr[NUM_FPU_REGS];
> uint64_t fcc; /* 8x8 */
> uint32_t fcsr;
> uint32_t ftop;
> - union fpureg fpr[NUM_FPU_REGS];
> };
>
> struct loongarch_lbt {
> --
> 2.53.0
>
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
2026-04-11 13:10 ` Huacai Chen
@ 2026-04-14 8:20 ` Huacai Chen
2026-04-14 13:02 ` Huacai Chen
0 siblings, 1 reply; 5+ messages in thread
From: Huacai Chen @ 2026-04-14 8:20 UTC (permalink / raw)
To: Lisa Robinson; +Cc: WANG Xuerui, loongarch, linux-kernel
On Sat, Apr 11, 2026 at 9:10 PM Huacai Chen <chenhuacai@kernel.org> wrote:
>
> Applied, thanks.
I'm sorry, I reverted this patch because it breaks the partial copy
optimization in arch_dup_task_struct().
Huacai
>
> Huacai
>
> On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
> >
> > Move fpr to the beginning of struct loongarch_fpu so it is naturally
> > aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> > switch performance.
> >
> > Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> > ---
> > arch/loongarch/include/asm/processor.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> > index c3bc44b5f5b3..ce8b953f8c79 100644
> > --- a/arch/loongarch/include/asm/processor.h
> > +++ b/arch/loongarch/include/asm/processor.h
> > @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> > BUILD_FPR_ACCESS(64)
> >
> > struct loongarch_fpu {
> > + union fpureg fpr[NUM_FPU_REGS];
> > uint64_t fcc; /* 8x8 */
> > uint32_t fcsr;
> > uint32_t ftop;
> > - union fpureg fpr[NUM_FPU_REGS];
> > };
> >
> > struct loongarch_lbt {
> > --
> > 2.53.0
> >
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
2026-04-14 8:20 ` Huacai Chen
@ 2026-04-14 13:02 ` Huacai Chen
2026-04-15 8:04 ` Lisa Robinson
0 siblings, 1 reply; 5+ messages in thread
From: Huacai Chen @ 2026-04-14 13:02 UTC (permalink / raw)
To: Lisa Robinson; +Cc: WANG Xuerui, loongarch, linux-kernel
On Tue, Apr 14, 2026 at 4:20 PM Huacai Chen <chenhuacai@kernel.org> wrote:
>
> On Sat, Apr 11, 2026 at 9:10 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> >
> > Applied, thanks.
> I'm sorry, I reverted this patch because it breaks the partial copy
> optimization in arch_dup_task_struct().
Fixed as this:
https://github.com/chenhuacai/linux/commit/c1365bc97d609438809d5d44d338adfc09767d6f
Huacai
>
> Huacai
>
> >
> > Huacai
> >
> > On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
> > >
> > > Move fpr to the beginning of struct loongarch_fpu so it is naturally
> > > aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> > > switch performance.
> > >
> > > Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> > > ---
> > > arch/loongarch/include/asm/processor.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> > > index c3bc44b5f5b3..ce8b953f8c79 100644
> > > --- a/arch/loongarch/include/asm/processor.h
> > > +++ b/arch/loongarch/include/asm/processor.h
> > > @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> > > BUILD_FPR_ACCESS(64)
> > >
> > > struct loongarch_fpu {
> > > + union fpureg fpr[NUM_FPU_REGS];
> > > uint64_t fcc; /* 8x8 */
> > > uint32_t fcsr;
> > > uint32_t ftop;
> > > - union fpureg fpr[NUM_FPU_REGS];
> > > };
> > >
> > > struct loongarch_lbt {
> > > --
> > > 2.53.0
> > >
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] LoongArch: Align FPU register state to 32 bytes
2026-04-14 13:02 ` Huacai Chen
@ 2026-04-15 8:04 ` Lisa Robinson
0 siblings, 0 replies; 5+ messages in thread
From: Lisa Robinson @ 2026-04-15 8:04 UTC (permalink / raw)
To: Huacai Chen; +Cc: WANG Xuerui, loongarch, linux-kernel
On Tue, Apr 14, 2026 at 9:02 PM Huacai Chen <chenhuacai@kernel.org> wrote:
>
> On Tue, Apr 14, 2026 at 4:20 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> >
> > On Sat, Apr 11, 2026 at 9:10 PM Huacai Chen <chenhuacai@kernel.org> wrote:
> > >
> > > Applied, thanks.
> > I'm sorry, I reverted this patch because it breaks the partial copy
> > optimization in arch_dup_task_struct().
> Fixed as this:
> https://github.com/chenhuacai/linux/commit/c1365bc97d609438809d5d44d338adfc09767d6f
Thanks for catching and fixing this.
Lisa
>
> Huacai
>
> >
> > Huacai
> >
> > >
> > > Huacai
> > >
> > > On Mon, Mar 30, 2026 at 5:49 PM Lisa Robinson <lisa@bytefly.space> wrote:
> > > >
> > > > Move fpr to the beginning of struct loongarch_fpu so it is naturally
> > > > aligned to FPU_ALIGN (32 bytes), improving 256-bit SIMD (LASX) context
> > > > switch performance.
> > > >
> > > > Signed-off-by: Lisa Robinson <lisa@bytefly.space>
> > > > ---
> > > > arch/loongarch/include/asm/processor.h | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/arch/loongarch/include/asm/processor.h b/arch/loongarch/include/asm/processor.h
> > > > index c3bc44b5f5b3..ce8b953f8c79 100644
> > > > --- a/arch/loongarch/include/asm/processor.h
> > > > +++ b/arch/loongarch/include/asm/processor.h
> > > > @@ -80,10 +80,10 @@ BUILD_FPR_ACCESS(32)
> > > > BUILD_FPR_ACCESS(64)
> > > >
> > > > struct loongarch_fpu {
> > > > + union fpureg fpr[NUM_FPU_REGS];
> > > > uint64_t fcc; /* 8x8 */
> > > > uint32_t fcsr;
> > > > uint32_t ftop;
> > > > - union fpureg fpr[NUM_FPU_REGS];
> > > > };
> > > >
> > > > struct loongarch_lbt {
> > > > --
> > > > 2.53.0
> > > >
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2026-04-15 8:04 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2026-03-30 9:48 [PATCH] LoongArch: Align FPU register state to 32 bytes Lisa Robinson
2026-04-11 13:10 ` Huacai Chen
2026-04-14 8:20 ` Huacai Chen
2026-04-14 13:02 ` Huacai Chen
2026-04-15 8:04 ` Lisa Robinson
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