mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Mikko Perttunen <mperttunen@nvidia.com>
To: "Thierry Reding" <thierry.reding@gmail.com>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>
Cc: linux-pwm@vger.kernel.org, linux-tegra@vger.kernel.org,
	 linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	 Thierry Reding <treding@nvidia.com>,
	 Mikko Perttunen <mperttunen@nvidia.com>,
	Yi-Wei Wang <yiweiw@nvidia.com>
Subject: [PATCH v4 0/7] Tegra264 PWM support
Date: Tue, 31 Mar 2026 11:12:12 +0900	[thread overview]
Message-ID: <20260331-t264-pwm-v4-0-c041659677cf@nvidia.com> (raw)

Hello,

this adds support for the PWM controller on Tegra264. The controller
is similar to previous generations, but the register fields are
widened, the depth is made configurable, and the enable bit moves
to a different spot.

This series adds only basic support with fixed depth -- configurable
depth will come later.

Patch 1 adds device tree bindings for Tegra264 PWM (compatible
  string).

Patches 2 to 6 contain the PWM driver changes.

Patch 7 adds device tree nodes for the PWM controllers on Tegra264.

Thanks,
Mikko

---
Changes in v4:
- Use ULONG_MAX rather than S64_MAX to avoid overflow on 32-bit platforms
- Link to v3: https://lore.kernel.org/r/20260330-t264-pwm-v3-0-5714427d5976@nvidia.com

Changes in v3:
- Fixed device tree binding patch.
- Picked up trailers.
- Link to v2: https://lore.kernel.org/r/20260325-t264-pwm-v2-0-998d885984b3@nvidia.com

Changes in v2:
- Added device tree binding and Tegra264 device tree patches by Thierry.
- Link to v1: https://lore.kernel.org/r/20260323-t264-pwm-v1-0-4c4ff743050f@nvidia.com

---
Mikko Perttunen (4):
      pwm: tegra: Modify read/write accessors for multi-register channel
      pwm: tegra: Parametrize enable register offset
      pwm: tegra: Parametrize duty and scale field widths
      pwm: tegra: Add support for Tegra264

Thierry Reding (2):
      dt-bindings: pwm: Document Tegra264 controller
      arm64: tegra: Add PWM controllers on Tegra264

Yi-Wei Wang (1):
      pwm: tegra: Avoid hard-coded max clock frequency

 .../bindings/pwm/nvidia,tegra20-pwm.yaml           |   1 +
 arch/arm64/boot/dts/nvidia/tegra264.dtsi           |  72 +++++++++++
 drivers/pwm/pwm-tegra.c                            | 141 ++++++++++++++-------
 3 files changed, 171 insertions(+), 43 deletions(-)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260303-t264-pwm-57e10d039df1


             reply	other threads:[~2026-03-31  2:12 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-31  2:12 Mikko Perttunen [this message]
2026-03-31  2:12 ` [PATCH v4 1/7] dt-bindings: pwm: Document Tegra264 controller Mikko Perttunen
2026-04-08 13:27   ` Rob Herring (Arm)
2026-03-31  2:12 ` [PATCH v4 2/7] pwm: tegra: Avoid hard-coded max clock frequency Mikko Perttunen
2026-03-31  7:29   ` Thierry Reding
2026-03-31  2:12 ` [PATCH v4 3/7] pwm: tegra: Modify read/write accessors for multi-register channel Mikko Perttunen
2026-05-17 17:30   ` Uwe Kleine-König
2026-05-18  2:31     ` Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 4/7] pwm: tegra: Parametrize enable register offset Mikko Perttunen
2026-03-31  7:30   ` Thierry Reding
2026-05-17 17:35   ` Uwe Kleine-König
2026-05-18  2:30     ` Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 5/7] pwm: tegra: Parametrize duty and scale field widths Mikko Perttunen
2026-03-31  2:12 ` [PATCH v4 6/7] pwm: tegra: Add support for Tegra264 Mikko Perttunen
2026-03-31  7:36   ` Thierry Reding
2026-03-31  2:12 ` [PATCH v4 7/7] arm64: tegra: Add PWM controllers on Tegra264 Mikko Perttunen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260331-t264-pwm-v4-0-c041659677cf@nvidia.com \
    --to=mperttunen@nvidia.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jonathanh@nvidia.com \
    --cc=krzk+dt@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux-tegra@vger.kernel.org \
    --cc=robh@kernel.org \
    --cc=thierry.reding@gmail.com \
    --cc=treding@nvidia.com \
    --cc=ukleinek@kernel.org \
    --cc=yiweiw@nvidia.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®