From: Jim Mattson <jmattson@google.com>
To: seanjc@google.com, pbonzini@redhat.com, tglx@kernel.org,
mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com,
x86@kernel.org, hpa@zytor.com, shuah@kernel.org,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-kselftest@vger.kernel.org, ctpence@google.com,
David.Kaplan@amd.com, binbin.wu@linux.intel.com
Cc: Jim Mattson <jmattson@google.com>
Subject: [PATCH v4 5/5] KVM: selftests: Update hwcr_msr_test for CPUID faulting bit
Date: Wed, 27 May 2026 10:43:47 -0700 [thread overview]
Message-ID: <20260527174347.2356165-6-jmattson@google.com> (raw)
In-Reply-To: <20260527174347.2356165-1-jmattson@google.com>
Add BIT_ULL(35) (CpuidUserDis) to the valid mask in hwcr_msr_test, now that
KVM accepts writes to this bit when the guest CPUID advertises
CpuidUserDis.
Signed-off-by: Jim Mattson <jmattson@google.com>
---
tools/testing/selftests/kvm/include/x86/processor.h | 1 +
tools/testing/selftests/kvm/x86/hwcr_msr_test.c | 9 +++++++--
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/tools/testing/selftests/kvm/include/x86/processor.h b/tools/testing/selftests/kvm/include/x86/processor.h
index 06878e7c7347..513e4a1075fa 100644
--- a/tools/testing/selftests/kvm/include/x86/processor.h
+++ b/tools/testing/selftests/kvm/include/x86/processor.h
@@ -226,6 +226,7 @@ struct kvm_x86_cpu_feature {
#define X86_FEATURE_SEV KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 1)
#define X86_FEATURE_SEV_ES KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 3)
#define X86_FEATURE_SEV_SNP KVM_X86_CPU_FEATURE(0x8000001F, 0, EAX, 4)
+#define X86_FEATURE_GP_ON_USER_CPUID KVM_X86_CPU_FEATURE(0x80000021, 0, EAX, 17)
#define X86_FEATURE_PERFMON_V2 KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 0)
#define X86_FEATURE_LBR_PMC_FREEZE KVM_X86_CPU_FEATURE(0x80000022, 0, EAX, 2)
diff --git a/tools/testing/selftests/kvm/x86/hwcr_msr_test.c b/tools/testing/selftests/kvm/x86/hwcr_msr_test.c
index 8e20a03b3329..53b7971aa072 100644
--- a/tools/testing/selftests/kvm/x86/hwcr_msr_test.c
+++ b/tools/testing/selftests/kvm/x86/hwcr_msr_test.c
@@ -11,12 +11,17 @@
void test_hwcr_bit(struct kvm_vcpu *vcpu, unsigned int bit)
{
const u64 ignored = BIT_ULL(3) | BIT_ULL(6) | BIT_ULL(8);
- const u64 valid = BIT_ULL(18) | BIT_ULL(24);
- const u64 legal = ignored | valid;
+ u64 valid = BIT_ULL(18) | BIT_ULL(24);
u64 val = BIT_ULL(bit);
u64 actual;
+ u64 legal;
int r;
+ if (kvm_cpu_has(X86_FEATURE_GP_ON_USER_CPUID))
+ valid |= BIT_ULL(35);
+
+ legal = ignored | valid;
+
r = _vcpu_set_msr(vcpu, MSR_K7_HWCR, val);
TEST_ASSERT(val & ~legal ? !r : r == 1,
"Expected KVM_SET_MSRS(MSR_K7_HWCR) = 0x%lx to %s",
--
2.54.0.794.g4f17f83d09-goog
next prev parent reply other threads:[~2026-05-27 17:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-27 17:43 [PATCH v4 0/5] KVM: x86: Virtualize AMD's "disable CPUID in usermode" Jim Mattson
2026-05-27 17:43 ` [PATCH v4 1/5] KVM: x86: Consolidate CPUID fault handling for emulator and interception logic Jim Mattson
2026-05-28 9:13 ` Peter Zijlstra
2026-05-28 14:20 ` Jim Mattson
2026-05-28 16:08 ` Sean Christopherson
2026-05-28 16:06 ` Sean Christopherson
2026-05-27 17:43 ` [PATCH v4 2/5] KVM: x86: Prioritize CPUID faulting over CPUID VM-exits in nested VMX Jim Mattson
2026-05-27 17:43 ` [PATCH v4 3/5] KVM: x86: Remove supports_cpuid_fault() helper Jim Mattson
2026-05-27 17:43 ` [PATCH v4 4/5] KVM: x86: Virtualize AMD CPUID faulting Jim Mattson
2026-05-27 17:43 ` Jim Mattson [this message]
2026-05-29 22:47 ` [PATCH v4 0/5] KVM: x86: Virtualize AMD's "disable CPUID in usermode" Sean Christopherson
2026-06-06 15:12 ` Jim Mattson
2026-06-06 16:00 ` Jim Mattson
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