From: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
To: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Jessica Zhang <jesszhan0024@gmail.com>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Abhinav Kumar <quic_abhinavk@quicinc.com>
Subject: [PATCH RESEND v5 02/25] drm/msm/dp: introduce max_streams for DP controller MST support
Date: Mon, 29 Jun 2026 22:14:23 +0800 [thread overview]
Message-ID: <20260629-msm-dp-mst-v5-2-2ed6aee1867a@oss.qualcomm.com> (raw)
In-Reply-To: <20260629-msm-dp-mst-v5-0-2ed6aee1867a@oss.qualcomm.com>
From: Abhinav Kumar <quic_abhinavk@quicinc.com>
DP controllers across different SoCs vary in the number of concurrent
MST streams they can support. Rather than hardcoding per-platform
values, the number of available pixel clocks in DT serves as a natural
indicator since each stream requires a dedicated pixel clock.
Introduce max_stream to capture this at initialization time and expose
it for the MST module to use during setup.
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
---
drivers/gpu/drm/msm/dp/dp_ctrl.c | 13 +++++++++++++
drivers/gpu/drm/msm/dp/dp_ctrl.h | 1 +
drivers/gpu/drm/msm/dp/dp_display.c | 12 ++++++++++++
drivers/gpu/drm/msm/dp/dp_display.h | 1 +
4 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index a475e787656e..68fb4facb056 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -127,6 +127,7 @@ struct msm_dp_ctrl_private {
struct clk_bulk_data *link_clks;
struct clk *pixel_clk[DP_STREAM_MAX];
+ unsigned int num_pixel_clks;
union phy_configure_opts phy_opts;
@@ -2754,6 +2755,7 @@ static int msm_dp_ctrl_clk_init(struct msm_dp_ctrl *msm_dp_ctrl)
if (rc)
return rc;
+ ctrl->num_pixel_clks = 0;
for (i = DP_STREAM_0; i < DP_STREAM_MAX; i++) {
ctrl->pixel_clk[i] = devm_clk_get(dev, pixel_clks[i]);
@@ -2766,11 +2768,22 @@ static int msm_dp_ctrl_clk_init(struct msm_dp_ctrl *msm_dp_ctrl)
DRM_DEBUG_DP("stream %d pixel clock not found", i);
break;
}
+
+ ctrl->num_pixel_clks++;
}
return 0;
}
+int msm_dp_ctrl_get_stream_cnt(struct msm_dp_ctrl *msm_dp_ctrl)
+{
+ struct msm_dp_ctrl_private *ctrl;
+
+ ctrl = container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctrl);
+
+ return ctrl->num_pixel_clks;
+}
+
struct msm_dp_ctrl *msm_dp_ctrl_get(struct device *dev, struct msm_dp_link *link,
struct drm_dp_aux *aux,
struct phy *phy,
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h
index be0d89d60914..305add3dcd93 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.h
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h
@@ -55,4 +55,5 @@ void msm_dp_ctrl_enable_irq(struct msm_dp_ctrl *msm_dp_ctrl);
void msm_dp_ctrl_disable_irq(struct msm_dp_ctrl *msm_dp_ctrl);
void msm_dp_ctrl_reinit_phy(struct msm_dp_ctrl *msm_dp_ctrl);
+int msm_dp_ctrl_get_stream_cnt(struct msm_dp_ctrl *dp_ctrl);
#endif /* _DP_CTRL_H_ */
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index bb243ab09e66..9cd243411e44 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -87,6 +87,8 @@ struct msm_dp_display_private {
void __iomem *p0_base;
size_t p0_len;
+
+ int max_stream;
};
struct msm_dp_desc {
@@ -578,6 +580,7 @@ static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp)
dp->ctrl = NULL;
goto error_link;
}
+ dp->max_stream = msm_dp_ctrl_get_stream_cnt(dp->ctrl);
dp->audio = msm_dp_audio_get(dp->msm_dp_display.pdev, dp->link_base);
if (IS_ERR(dp->audio)) {
@@ -1178,6 +1181,15 @@ static int msm_dp_display_get_io(struct msm_dp_display_private *display)
return 0;
}
+int msm_dp_get_mst_max_stream(struct msm_dp *msm_dp_display)
+{
+ struct msm_dp_display_private *dp;
+
+ dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
+
+ return dp->max_stream;
+}
+
static int msm_dp_display_probe(struct platform_device *pdev)
{
int rc = 0;
diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h
index 43ed79093e24..d3d4ab98089d 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.h
+++ b/drivers/gpu/drm/msm/dp/dp_display.h
@@ -26,6 +26,7 @@ struct msm_dp {
bool psr_supported;
};
+int msm_dp_get_mst_max_stream(struct msm_dp *msm_dp_display);
int msm_dp_display_get_modes(struct msm_dp *msm_dp_display);
bool msm_dp_display_check_video_test(struct msm_dp *msm_dp_display);
int msm_dp_display_get_test_bpp(struct msm_dp *msm_dp_display);
--
2.43.0
next prev parent reply other threads:[~2026-06-29 14:15 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 14:14 [PATCH RESEND v5 00/25] drm/msm/dp: Add MST support for MSM chipsets Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 01/25] drm/msm/dp: introduce stream_id for each DP panel Yongxing Mou
2026-07-12 11:11 ` Dmitry Baryshkov
2026-06-29 14:14 ` Yongxing Mou [this message]
2026-07-12 11:17 ` [PATCH RESEND v5 02/25] drm/msm/dp: introduce max_streams for DP controller MST support Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 03/25] drm/msm/dp: Add support for programming p1/p2/p3 register blocks Yongxing Mou
2026-07-12 11:23 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 04/25] drm/msm/dp: use stream_id to change offsets in dp_catalog Yongxing Mou
2026-07-12 11:29 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 05/25] drm/msm/dp: add support to send ACT packets for MST Yongxing Mou
2026-07-12 13:56 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 06/25] drm/msm/dp: Add support to enable MST in mainlink control Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 07/25] drm/msm/dp: no need to update tu calculation for mst Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 08/25] drm/msm/dp: Add support for MST channel slot allocation Yongxing Mou
2026-07-12 18:57 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 09/25] drm/msm/dp: Add support for sending VCPF packets in DP controller Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 10/25] drm/msm/dp: Always program MST_FIFO_CONSTANT_FILL for MST use cases Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 11/25] drm/msm/dp: move link-level teardown from display_disable to display_unprepare Yongxing Mou
2026-07-12 18:20 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 12/25] drm/msm/dp: factor out _helper variants of bridge ops accepting a panel Yongxing Mou
2026-07-12 18:43 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 13/25] drm/msm/dp: replace power_on with active_stream_cnt for dp_display Yongxing Mou
2026-07-12 18:51 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 14/25] drm/msm/dp: Mark the SST bridge disconnected when mst is active Yongxing Mou
2026-07-12 21:00 ` Dmitry Baryshkov
2026-07-12 21:03 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 15/25] drm/msm/dp: add an API to initialize MST on sink side Yongxing Mou
2026-07-12 21:35 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 16/25] drm/msm/dp: add msm_dp_display_get_panel() to initialize DP panel Yongxing Mou
2026-07-12 21:56 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 17/25] drm/msm/dp: add link_ready to manage link-level operations Yongxing Mou
2026-07-12 23:46 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 18/25] drm/msm/dpu: initialize encoders per stream for DP MST Yongxing Mou
2026-07-12 23:55 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 19/25] drm/msm/dp: initialize dp_mst module for each DP MST controller Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 20/25] drm/msm/dpu: expose dpu_encoder ops for DP MST reuse Yongxing Mou
2026-07-13 0:01 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 21/25] drm/msm/dpu: use msm_dp_get_mst_intf_id() to get the intf id Yongxing Mou
2026-07-13 0:09 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 22/25] drm/msm/dp: wire MST helpers into atomic check and commit paths Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 23/25] drm/msm/dp: add dp_mst_drm to manage DP MST encoder operations Yongxing Mou
2026-07-13 0:40 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 24/25] drm/msm/dp: add connector abstraction for DP MST Yongxing Mou
2026-07-13 0:52 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 25/25] drm/msm/dp: add HPD callback for dp MST Yongxing Mou
2026-07-13 0:54 ` Dmitry Baryshkov
2026-07-12 11:04 ` [PATCH RESEND v5 00/25] drm/msm/dp: Add MST support for MSM chipsets Dmitry Baryshkov
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