From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
Cc: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Jessica Zhang <jesszhan0024@gmail.com>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Abhinav Kumar <quic_abhinavk@quicinc.com>
Subject: Re: [PATCH RESEND v5 21/25] drm/msm/dpu: use msm_dp_get_mst_intf_id() to get the intf id
Date: Mon, 13 Jul 2026 03:09:34 +0300 [thread overview]
Message-ID: <pnhfi37ijlxuboqritlsg2o6wew44pe7niyhyvxc3dbrdvgazc@dfpldilmrp7r> (raw)
In-Reply-To: <20260629-msm-dp-mst-v5-21-2ed6aee1867a@oss.qualcomm.com>
On Mon, Jun 29, 2026 at 10:14:42PM +0800, Yongxing Mou wrote:
> Use msm_dp_get_mst_intf_id() to get the interface ID for the DP MST
> controller as the intf_id is unique for each MST stream of each DP
> controller.
>
> For DSI/eDP/DP SST, the stream_id is always 0, so existing behavior
> remains unchanged.
>
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
> Signed-off-by: Yongxing Mou <yongxing.mou@oss.qualcomm.com>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 20 +++++++++++---------
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 ++
> drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 ++++
> 3 files changed, 17 insertions(+), 9 deletions(-)
This really should have been a part (or done before) the patch adding
DPMST encoders.
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index 1c74ff6f0dbd..3adfaeaab71d 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1438,18 +1438,21 @@ void dpu_encoder_phys_disable(struct drm_encoder *drm_enc,
>
> static struct dpu_hw_intf *dpu_encoder_get_intf(const struct dpu_mdss_cfg *catalog,
> struct dpu_rm *dpu_rm,
> - enum dpu_intf_type type, u32 controller_id)
> + struct msm_display_info *disp_info, u32 controller_id)
As you are now passing whole msm_display_info, controller_id is
available as disp_info->h_tile_instance[i]. Pass index to this function
instead of passing controller_id.
Ideally, split this patch into two: one changing the function to get
disp_info, another one adding stream_id to the struct.
> {
> - int i = 0;
> + int i = 0, cnt = 0;
> + int stream_id = disp_info->stream_id;
>
> - if (type == INTF_WB)
> + if (disp_info->intf_type == INTF_WB)
> return NULL;
>
> + DPU_DEBUG("intf_type 0x%x controller_id %d stream_id %d\n",
> + disp_info->intf_type, controller_id, stream_id);
> for (i = 0; i < catalog->intf_count; i++) {
> - if (catalog->intf[i].type == type
> - && catalog->intf[i].controller_id == controller_id) {
> - return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id);
> - }
> + if (catalog->intf[i].type == disp_info->intf_type &&
> + controller_id == catalog->intf[i].controller_id)
Why did you change the order of the args?
> + if (cnt++ == stream_id)
Squash into the condition.
> + return dpu_rm_get_intf(dpu_rm, catalog->intf[i].id);
> }
>
> return NULL;
> @@ -2675,8 +2678,7 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
> i, controller_id, phys_params.split_role);
>
> phys_params.hw_intf = dpu_encoder_get_intf(dpu_kms->catalog, &dpu_kms->rm,
> - disp_info->intf_type,
> - controller_id);
> + disp_info, controller_id);
>
> if (disp_info->intf_type == INTF_WB && controller_id < WB_MAX)
> phys_params.hw_wb = dpu_rm_get_wb(&dpu_kms->rm, controller_id);
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> index 25ade3dbbeda..861d69afbd76 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
> @@ -28,6 +28,7 @@
> * @h_tile_instance: Controller instance used per tile. Number of elements is
> * based on num_of_h_tiles
> * @is_cmd_mode Boolean to indicate if the CMD mode is requested
> + * @stream_id stream id for which the interface needs to be acquired
> * @vsync_source: Source of the TE signal for DSI CMD devices
> */
> struct msm_display_info {
> @@ -35,6 +36,7 @@ struct msm_display_info {
> uint32_t num_of_h_tiles;
> uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY];
> bool is_cmd_mode;
> + int stream_id;
> enum dpu_vsync_source vsync_source;
> };
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> index 91d33b432427..b32ecd5b0777 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
> @@ -614,6 +614,7 @@ static int _dpu_kms_initialize_dsi(struct drm_device *dev,
> info.h_tile_instance[info.num_of_h_tiles++] = other;
>
> info.is_cmd_mode = msm_dsi_is_cmd_mode(priv->kms->dsi[i]);
> + info.stream_id = 0;
It is memset to 0. Drop this (here and below).
>
> rc = dpu_kms_dsi_set_te_source(&info, priv->kms->dsi[i]);
> if (rc) {
> @@ -689,6 +690,7 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev,
> }
>
> for (stream_id = 0; stream_id < stream_cnt; stream_id++) {
> + info.stream_id = stream_id;
> encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DPMST, &info);
> if (IS_ERR(encoder)) {
> DPU_ERROR("encoder init failed for dp mst display\n");
> @@ -716,6 +718,7 @@ static int _dpu_kms_initialize_hdmi(struct drm_device *dev,
> info.num_of_h_tiles = 1;
> info.h_tile_instance[0] = 0;
> info.intf_type = INTF_HDMI;
> + info.stream_id = 0;
>
> encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_TMDS, &info);
> if (IS_ERR(encoder)) {
> @@ -748,6 +751,7 @@ static int _dpu_kms_initialize_writeback(struct drm_device *dev,
> /* use only WB idx 2 instance for DPU */
> info.h_tile_instance[0] = wb_idx;
> info.intf_type = INTF_WB;
> + info.stream_id = 0;
>
> maxlinewidth = dpu_rm_get_wb(&dpu_kms->rm, info.h_tile_instance[0])->caps->maxlinewidth;
>
>
> --
> 2.43.0
>
--
With best wishes
Dmitry
next prev parent reply other threads:[~2026-07-13 0:09 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 14:14 [PATCH RESEND v5 00/25] drm/msm/dp: Add MST support for MSM chipsets Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 01/25] drm/msm/dp: introduce stream_id for each DP panel Yongxing Mou
2026-07-12 11:11 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 02/25] drm/msm/dp: introduce max_streams for DP controller MST support Yongxing Mou
2026-07-12 11:17 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 03/25] drm/msm/dp: Add support for programming p1/p2/p3 register blocks Yongxing Mou
2026-07-12 11:23 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 04/25] drm/msm/dp: use stream_id to change offsets in dp_catalog Yongxing Mou
2026-07-12 11:29 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 05/25] drm/msm/dp: add support to send ACT packets for MST Yongxing Mou
2026-07-12 13:56 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 06/25] drm/msm/dp: Add support to enable MST in mainlink control Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 07/25] drm/msm/dp: no need to update tu calculation for mst Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 08/25] drm/msm/dp: Add support for MST channel slot allocation Yongxing Mou
2026-07-12 18:57 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 09/25] drm/msm/dp: Add support for sending VCPF packets in DP controller Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 10/25] drm/msm/dp: Always program MST_FIFO_CONSTANT_FILL for MST use cases Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 11/25] drm/msm/dp: move link-level teardown from display_disable to display_unprepare Yongxing Mou
2026-07-12 18:20 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 12/25] drm/msm/dp: factor out _helper variants of bridge ops accepting a panel Yongxing Mou
2026-07-12 18:43 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 13/25] drm/msm/dp: replace power_on with active_stream_cnt for dp_display Yongxing Mou
2026-07-12 18:51 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 14/25] drm/msm/dp: Mark the SST bridge disconnected when mst is active Yongxing Mou
2026-07-12 21:00 ` Dmitry Baryshkov
2026-07-12 21:03 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 15/25] drm/msm/dp: add an API to initialize MST on sink side Yongxing Mou
2026-07-12 21:35 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 16/25] drm/msm/dp: add msm_dp_display_get_panel() to initialize DP panel Yongxing Mou
2026-07-12 21:56 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 17/25] drm/msm/dp: add link_ready to manage link-level operations Yongxing Mou
2026-07-12 23:46 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 18/25] drm/msm/dpu: initialize encoders per stream for DP MST Yongxing Mou
2026-07-12 23:55 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 19/25] drm/msm/dp: initialize dp_mst module for each DP MST controller Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 20/25] drm/msm/dpu: expose dpu_encoder ops for DP MST reuse Yongxing Mou
2026-07-13 0:01 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 21/25] drm/msm/dpu: use msm_dp_get_mst_intf_id() to get the intf id Yongxing Mou
2026-07-13 0:09 ` Dmitry Baryshkov [this message]
2026-06-29 14:14 ` [PATCH RESEND v5 22/25] drm/msm/dp: wire MST helpers into atomic check and commit paths Yongxing Mou
2026-06-29 14:14 ` [PATCH RESEND v5 23/25] drm/msm/dp: add dp_mst_drm to manage DP MST encoder operations Yongxing Mou
2026-07-13 0:40 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 24/25] drm/msm/dp: add connector abstraction for DP MST Yongxing Mou
2026-07-13 0:52 ` Dmitry Baryshkov
2026-06-29 14:14 ` [PATCH RESEND v5 25/25] drm/msm/dp: add HPD callback for dp MST Yongxing Mou
2026-07-13 0:54 ` Dmitry Baryshkov
2026-07-12 11:04 ` [PATCH RESEND v5 00/25] drm/msm/dp: Add MST support for MSM chipsets Dmitry Baryshkov
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