[PATCH net-next v2 0/2] net: phy: Add Maxio MAE0621A support

[PATCH net-next v2 0/2] net: phy: Add Maxio MAE0621A support

[Liu Changjie]

Add a binding and PHY driver for the Maxio MAE0621A Gigabit Ethernet
PHY. The driver matches the exact PHY ID and optionally selects a
125 MHz clock on CLKOUT. When the property is absent, the driver
preserves the hardware strap or bootloader setting.

This was tested on the LCKFB Taishan Pi 3M. With the PHY's default
CLKOUT configuration, the RK3576 GMAC negotiated a 1 Gbit/s link but
the data path did not work. A read-modify-write of page 0xa43,
register 0x19, setting bits 0 and 11 produced a readback value of
0x0823 and restored the data path without changing the RGMII delays.
The readback also confirmed that the unrelated set bits were
preserved.

Only the 125 MHz setting has been exercised on hardware and only that
value is exposed by this series. The 0 and 25 MHz choices from the
initial draft have been removed.

Public documentation for the MAE0621A register is not available. The
exact definitions of page 0xa43, register 0x19 bits 0 and 11, their
reset defaults, and whether a soft reset is required after changing
them still need confirmation from Maxio. The register programming in
this series is therefore supported by the hardware A/B result, not by
a public datasheet citation.

Hardware tests with the 125 MHz setting:
- all supported 10/100/1000 Mbit/s link modes
- 100 ICMP packets in each direction with no loss
- 936/934 Mbit/s host-to-board iperf3, no retransmits
- 943/941 Mbit/s board-to-host iperf3, no retransmits
- link unplug/replug and a normal reboot, followed by another 100 ICMP
  packets in each direction with no loss
- no RX errors, missed packets, carrier errors or collisions

Static tests on net-next commit f6f3b36c15ed:
- dt_binding_check with dtschema 2026.6
- W=1 arm64 defconfig build of drivers/net/phy/maxio.o with GCC 10.3
- W=1 arm64 allmodconfig build of drivers/net/phy/maxio.o with GCC 10.3
- git diff --check and checkpatch.pl

Changes in v2:
- Extend hardware validation to all supported 10/100/1000 Mbit/s link
  modes.
- Keep the binding limited to the tested 125 MHz setting. CLKOUT-disable
  support can be added later after its register behavior is documented
  and tested.
- No binding or driver code changes.

Link: https://lore.kernel.org/r/MN0PR19MB6091CD5A84D2DA5DACF434DAACF92@MN0PR19MB6091.namprd19.prod.outlook.com [v1]

Liu Changjie (2):
  dt-bindings: net: Add Maxio MAE0621A PHY
  net: phy: Add support for the Maxio MAE0621A

 .../bindings/net/maxio,mae0621a.yaml          |  38 +++++++
 .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
 drivers/net/phy/Kconfig                       |   8 ++
 drivers/net/phy/Makefile                      |   1 +
 drivers/net/phy/maxio.c                       | 103 ++++++++++++++++++
 5 files changed, 152 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/maxio,mae0621a.yaml
 create mode 100644 drivers/net/phy/maxio.c


base-commit: f6f3b36c15ed44de1fbb44e645e4fae8c4a4453e
-- 
2.55.0

[PATCH net-next v2 2/2] net: phy: Add support for the Maxio MAE0621A

[Liu Changjie]

Add exact PHY ID matching and optional 125 MHz CLKOUT configuration
for the Maxio MAE0621A Gigabit Ethernet PHY. Preserve the existing
hardware configuration when the firmware property is absent.

Signed-off-by: Liu Changjie <liucj1228@outlook.com>
---
 drivers/net/phy/Kconfig  |   8 +++
 drivers/net/phy/Makefile |   1 +
 drivers/net/phy/maxio.c  | 103 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 112 insertions(+)
 create mode 100644 drivers/net/phy/maxio.c

diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
index 099f25dce..32e1a035b 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -283,6 +283,14 @@ config MARVELL_88X2222_PHY
 	  Support for the Marvell 88X2222 Dual-port Multi-speed Ethernet
 	  Transceiver.
 
+config MAXIO_PHY
+	tristate "Maxio Ethernet PHYs"
+	help
+	  Support for Maxio Ethernet PHYs. Currently this driver supports the
+	  MAE0621A Gigabit Ethernet PHY. The driver optionally selects a 125 MHz
+	  clock on the CLKOUT pin while preserving the hardware configuration on
+	  boards which do not request it.
+
 config MAXLINEAR_GPHY
 	tristate "Maxlinear Ethernet PHYs"
 	select POLYNOMIAL if HWMON
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
index de660ae94..7fb3626f0 100644
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_MARVELL_10G_PHY)	+= marvell10g.o
 obj-$(CONFIG_MARVELL_PHY)	+= marvell.o
 obj-$(CONFIG_MARVELL_88Q2XXX_PHY)	+= marvell-88q2xxx.o
 obj-$(CONFIG_MARVELL_88X2222_PHY)	+= marvell-88x2222.o
+obj-$(CONFIG_MAXIO_PHY)		+= maxio.o
 obj-$(CONFIG_MAXLINEAR_GPHY)	+= mxl-gpy.o
 obj-$(CONFIG_MAXLINEAR_86110_PHY)	+= mxl-86110.o
 obj-y				+= mediatek/
diff --git a/drivers/net/phy/maxio.c b/drivers/net/phy/maxio.c
new file mode 100644
index 000000000..d2cb23895
--- /dev/null
+++ b/drivers/net/phy/maxio.c
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Driver for Maxio Ethernet PHYs. */
+
+#include <linux/bitops.h>
+#include <linux/module.h>
+#include <linux/phy.h>
+#include <linux/property.h>
+
+#define MAXIO_MAE0621A_PHY_ID		0x7b744412
+
+#define MAXIO_PAGE_SELECT		0x1f
+#define MAXIO_MAE0621A_PHYCR2_PAGE	0xa43
+#define MAXIO_MAE0621A_PHYCR2		0x19
+#define MAXIO_MAE0621A_CLKOUT_125M	BIT(11)
+#define MAXIO_MAE0621A_CLKOUT_ENABLE	BIT(0)
+
+struct maxio_priv {
+	bool clk_out_125m;
+};
+
+static int maxio_read_page(struct phy_device *phydev)
+{
+	return __phy_read(phydev, MAXIO_PAGE_SELECT);
+}
+
+static int maxio_write_page(struct phy_device *phydev, int page)
+{
+	return __phy_write(phydev, MAXIO_PAGE_SELECT, page);
+}
+
+static int maxio_mae0621a_probe(struct phy_device *phydev)
+{
+	struct device *dev = &phydev->mdio.dev;
+	struct maxio_priv *priv;
+	u32 frequency;
+	int ret;
+
+	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	phydev->priv = priv;
+
+	ret = device_property_read_u32(dev, "maxio,clk-out-frequency-hz",
+				       &frequency);
+	if (ret == -EINVAL)
+		return 0;
+	if (ret)
+		return ret;
+
+	if (frequency != 125000000) {
+		phydev_err(phydev, "invalid CLKOUT frequency %u\n", frequency);
+		return -EINVAL;
+	}
+
+	priv->clk_out_125m = true;
+
+	return 0;
+}
+
+static int maxio_mae0621a_config_init(struct phy_device *phydev)
+{
+	struct maxio_priv *priv = phydev->priv;
+	int ret;
+
+	if (!priv->clk_out_125m)
+		return 0;
+
+	ret = phy_modify_paged_changed(phydev, MAXIO_MAE0621A_PHYCR2_PAGE,
+				       MAXIO_MAE0621A_PHYCR2,
+				       MAXIO_MAE0621A_CLKOUT_ENABLE |
+				       MAXIO_MAE0621A_CLKOUT_125M,
+				       MAXIO_MAE0621A_CLKOUT_ENABLE |
+				       MAXIO_MAE0621A_CLKOUT_125M);
+	if (ret <= 0)
+		return ret;
+
+	return genphy_soft_reset(phydev);
+}
+
+static struct phy_driver maxio_drivers[] = {
+	{
+		PHY_ID_MATCH_EXACT(MAXIO_MAE0621A_PHY_ID),
+		.name		= "Maxio MAE0621A",
+		.probe		= maxio_mae0621a_probe,
+		.config_init	= maxio_mae0621a_config_init,
+		.suspend	= genphy_suspend,
+		.resume		= genphy_resume,
+		.read_page	= maxio_read_page,
+		.write_page	= maxio_write_page,
+	},
+};
+module_phy_driver(maxio_drivers);
+
+static const struct mdio_device_id __maybe_unused maxio_tbl[] = {
+	{ PHY_ID_MATCH_EXACT(MAXIO_MAE0621A_PHY_ID) },
+	{ }
+};
+MODULE_DEVICE_TABLE(mdio, maxio_tbl);
+
+MODULE_AUTHOR("Liu Changjie <liucj1228@outlook.com>");
+MODULE_DESCRIPTION("Maxio Ethernet PHY driver");
+MODULE_LICENSE("GPL");
-- 
2.55.0

Re: [PATCH net-next v2 2/2] net: phy: Add support for the Maxio MAE0621A

[Andrew Lunn]

On Fri, Jul 17, 2026 at 11:44:03AM +0800, Liu Changjie wrote:
> Add exact PHY ID matching and optional 125 MHz CLKOUT configuration
> for the Maxio MAE0621A Gigabit Ethernet PHY. Preserve the existing
> hardware configuration when the firmware property is absent.
> 
> Signed-off-by: Liu Changjie <liucj1228@outlook.com>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

[PATCH net-next v2 1/2] dt-bindings: net: Add Maxio MAE0621A PHY

[Liu Changjie]

Document the MAE0621A PHY ID and its optional 125 MHz CLKOUT
setting. Boards which do not provide the property retain the hardware
strap or bootloader configuration.

Only the 125 MHz setting is exposed because it is the only setting
exercised on hardware.

Signed-off-by: Liu Changjie <liucj1228@outlook.com>
---
 .../bindings/net/maxio,mae0621a.yaml          | 38 +++++++++++++++++++
 .../devicetree/bindings/vendor-prefixes.yaml  |  2 +
 2 files changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/maxio,mae0621a.yaml

diff --git a/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml b/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml
new file mode 100644
index 000000000..f1ea54583
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/maxio,mae0621a.yaml
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/maxio,mae0621a.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Maxio MAE0621A Ethernet PHY
+
+maintainers:
+  - Liu Changjie <liucj1228@outlook.com>
+
+allOf:
+  - $ref: ethernet-phy.yaml#
+
+properties:
+  compatible:
+    const: ethernet-phy-id7b74.4412
+
+  maxio,clk-out-frequency-hz:
+    description:
+      Selects a 125 MHz clock on the CLKOUT pin. If the property is absent,
+      the hardware strap or bootloader configuration is preserved.
+    const: 125000000
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    mdio {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        ethernet-phy@1 {
+            compatible = "ethernet-phy-id7b74.4412";
+            reg = <1>;
+            maxio,clk-out-frequency-hz = <125000000>;
+        };
+    };
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml
index 396044f36..eeaf0b7a1 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@ -1013,6 +1013,8 @@ patternProperties:
     description: MaxBotix Inc.
   "^maxim,.*":
     description: Maxim Integrated Products
+  "^maxio,.*":
+    description: Maxio Technology (Hangzhou) Co., Ltd.
   "^maxlinear,.*":
     description: MaxLinear Inc.
   "^maxtor,.*":
-- 
2.55.0

Re: [PATCH net-next v2 1/2] dt-bindings: net: Add Maxio MAE0621A PHY

[Krzysztof Kozlowski]

On Fri, Jul 17, 2026 at 11:44:03AM +0800, Liu Changjie wrote:
> Document the MAE0621A PHY ID and its optional 125 MHz CLKOUT
> setting. Boards which do not provide the property retain the hardware
> strap or bootloader configuration.
> 
> Only the 125 MHz setting is exposed because it is the only setting
> exercised on hardware.
> 
> Signed-off-by: Liu Changjie <liucj1228@outlook.com>
> ---

How did you address previous feedback?

If you ignore feedback, shall we ignore the patch?

Best regards,
Krzysztof

Re: [PATCH net-next v2 1/2] dt-bindings: net: Add Maxio MAE0621A PHY

[Liu Changjie]

Hi Krzysztof,

> How did you address previous feedback?
>
> If you ignore feedback, shall we ignore the patch?

You are right. I should have documented the disposition of Andrew's
comment in this patch's changelog below the --- separator, rather than
only in the cover letter. Sorry about that.

Andrew suggested allowing a value of 0 to disable CLKOUT and noted that
this could also be added later. I intentionally did not add 0 in v2. The
only setting I have tested on this PHY is 125 MHz, and public documentation
for page 0xa43, register 0x19 is not available, so I cannot yet verify the
register programming and reset requirements for disabling CLKOUT.

Andrew's comment:
  https://lore.kernel.org/r/1a02ef89-2608-44c4-847f-239d9b86c7ab@lunn.ch

The deferral is recorded in the cover letter's Changes in v2 section:
  https://lore.kernel.org/r/MN0PR19MB609154F210DF84DCB29D3696ACC62@MN0PR19MB6091.namprd19.prod.outlook.com

I did not intend to ignore the feedback; I deferred that optional extension
until it can be documented and tested properly. I will state this explicitly
in the per-patch changelog in any future revision.

Best regards,
Liu Changjie