From: Taniya Das <taniya.das@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Shawn Guo <shengchao.guo@oss.qualcomm.com>,
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
Imran Shaik <imran.shaik@oss.qualcomm.com>,
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Taniya Das <taniya.das@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: [PATCH v2 0/6] clk: qcom: Add Nord multimedia clock controller support
Date: Tue, 21 Jul 2026 12:37:15 +0530 [thread overview]
Message-ID: <20260721-nords_mm_v1-v2-0-17e5a445a512@oss.qualcomm.com> (raw)
This series adds clock controller support for the multimedia subsystems
on the Qualcomm Nord SoC platform, along with two fixes for always-on
clocks that were incorrectly exposed as controllable branches.
The Nord platform is a multi-cluster SoC that includes dedicated clock
controllers for the display and graphics subsystems. This series adds:
- DT bindings and driver support for the two display clock controller
instances (DISPCC_0 and DISPCC_1).
- DT bindings and driver support for the two GPU clock controller
instances (GPUCC and GPU2CC).
- A fix for the GCC-Nord driver to mark PCIe link AHB and XO clocks
as critical CBCRs instead of gatable clk_branch instances.
- A fix for the NEGCC-Nord driver to mark the GPU2 CFG clock as a
critical CBCR instead of a controllable clk_branch.
The two fix patches carry Fixes: tags pointing to the original Nord GCC
commit and are candidates for stable backport.
Changes in v2:
- Split the GPU2CC-specific clock and reset IDs (MND1X_1_GFX3D_CLK,
FF_BCR, GMU_BCR) out of the shared qcom,nord-gpucc.h dt-bindings
header into a new qcom,nord-gpu2cc.h header, since GPUCC and GPU2CC
are separate DT nodes with independent ID namespaces.
- Updated qcom,nord-dispcc.h comments to reflect that the header now
covers both the DISPCC_0 and DISPCC_1 instances.
- Dropped unnecessary <linux/mod_devicetable.h> and <linux/of.h>
includes from dispcc0-nord.c, dispcc1-nord.c, gpucc-nord.c, and
gpu2cc-nord.c.
- Link to v1: https://lore.kernel.org/r/20260623-nords_mm_v1-v1-0-860c84539804@oss.qualcomm.com
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
---
Taniya Das (6):
clk: qcom: gcc-nord: mark PCIe link clocks as critical
clk: qcom: negcc-nord: keep GPU2 CFG clock enabled via critical CBCR
dt-bindings: clock: qcom: Document Nord display clock controller
clk: qcom: Add Nord display clock controller support
dt-bindings: clock: qcom: Document Nord GPU clock controllers
clk: qcom: gpucc: Add Nord graphics clock controller support
.../bindings/clock/qcom,sm8450-gpucc.yaml | 3 +
.../bindings/clock/qcom,sm8550-dispcc.yaml | 3 +
drivers/clk/qcom/Kconfig | 22 +
drivers/clk/qcom/Makefile | 2 +
drivers/clk/qcom/dispcc0-nord.c | 2004 ++++++++++++++++++++
drivers/clk/qcom/dispcc1-nord.c | 2004 ++++++++++++++++++++
drivers/clk/qcom/gcc-nord.c | 37 +-
drivers/clk/qcom/gpu2cc-nord.c | 545 ++++++
drivers/clk/qcom/gpucc-nord.c | 593 ++++++
drivers/clk/qcom/negcc-nord.c | 22 +-
include/dt-bindings/clock/qcom,nord-dispcc.h | 115 ++
include/dt-bindings/clock/qcom,nord-gpu2cc.h | 47 +
include/dt-bindings/clock/qcom,nord-gpucc.h | 48 +
13 files changed, 5399 insertions(+), 46 deletions(-)
---
base-commit: 3ce97bd3c4f18608335e709c24d6a40e7036cab8
change-id: 20260620-nords_mm_v1-9b7dd4f92d6d
Best regards,
--
Taniya Das <taniya.das@oss.qualcomm.com>
next reply other threads:[~2026-07-21 7:07 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 7:07 Taniya Das [this message]
2026-07-21 7:07 ` [PATCH v2 1/6] clk: qcom: gcc-nord: mark PCIe link clocks as critical Taniya Das
2026-07-22 8:37 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 2/6] clk: qcom: negcc-nord: keep GPU2 CFG clock enabled via critical CBCR Taniya Das
2026-07-22 8:37 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 3/6] dt-bindings: clock: qcom: Document Nord display clock controller Taniya Das
2026-07-22 2:28 ` Shawn Guo
2026-07-23 7:54 ` Krzysztof Kozlowski
2026-07-23 13:33 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 4/6] clk: qcom: Add Nord display clock controller support Taniya Das
2026-07-22 2:31 ` Shawn Guo
2026-07-22 8:32 ` Alexandre Mergnat
2026-07-24 10:19 ` Taniya Das
2026-07-21 7:07 ` [PATCH v2 5/6] dt-bindings: clock: qcom: Document Nord GPU clock controllers Taniya Das
2026-07-22 2:37 ` Shawn Guo
2026-07-24 10:20 ` Taniya Das
2026-07-23 7:55 ` Krzysztof Kozlowski
2026-07-24 10:20 ` Taniya Das
2026-07-23 13:33 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 6/6] clk: qcom: gpucc: Add Nord graphics clock controller support Taniya Das
2026-07-22 2:42 ` Shawn Guo
2026-07-23 13:33 ` Alexandre Mergnat
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260721-nords_mm_v1-v2-0-17e5a445a512@oss.qualcomm.com \
--to=taniya.das@oss.qualcomm.com \
--cc=ajit.pandey@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=bartosz.golaszewski@oss.qualcomm.com \
--cc=bmasney@redhat.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=imran.shaik@oss.qualcomm.com \
--cc=jagadeesh.kona@oss.qualcomm.com \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=neil.armstrong@linaro.org \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=shengchao.guo@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®