From: Taniya Das <taniya.das@oss.qualcomm.com>
To: Alexandre Mergnat <amergnat@baylibre.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>,
Shawn Guo <shengchao.guo@oss.qualcomm.com>,
Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Neil Armstrong <neil.armstrong@linaro.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Ajit Pandey <ajit.pandey@oss.qualcomm.com>,
Imran Shaik <imran.shaik@oss.qualcomm.com>,
Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v2 4/6] clk: qcom: Add Nord display clock controller support
Date: Fri, 24 Jul 2026 15:49:23 +0530 [thread overview]
Message-ID: <e2063dbf-f899-4f74-9eda-386a58fce23e@oss.qualcomm.com> (raw)
In-Reply-To: <178470914171.3016846.549735580156854018.b4-review@b4>
On 7/22/2026 2:02 PM, Alexandre Mergnat wrote:
>> +
>> +static const u32 disp_cc_0_nord_critical_cbcrs[] = {
>> + 0xc00c, /* MDSS_DISP_CC_AHB_CLK */
>> + 0xc008, /* MDSS_DISP_CC_VSYNC_CLK */
> These two comments look mislabeled: offsets 0xc00c/0xc008 are the RSCC AHB/VSYNC
> clocks (cf. disp_cc_mdss_rscc_ahb_clk @0xc00c and disp_cc_mdss_rscc_vsync_clk @0xc008
> in dispcc-sm8550.c / dispcc-milos.c), whereas the plain AHB/VSYNC branches in this
> file are at 0x80c0 / 0x8030. dispcc1-nord.c labels these same offsets as RSCC.
> Can you double check and update them to MDSS_DISP_CC_RSCC_AHB_CLK and
> MDSS_DISP_CC_RSCC_VSYNC_CLK ?
> The offsets looks correct, only the comments differ.
Yes, Alexandra the comments are mislabeled. I will fix in the next patch.
--
Thanks,
Taniya Das
next prev parent reply other threads:[~2026-07-24 10:19 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-21 7:07 [PATCH v2 0/6] clk: qcom: Add Nord multimedia " Taniya Das
2026-07-21 7:07 ` [PATCH v2 1/6] clk: qcom: gcc-nord: mark PCIe link clocks as critical Taniya Das
2026-07-22 8:37 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 2/6] clk: qcom: negcc-nord: keep GPU2 CFG clock enabled via critical CBCR Taniya Das
2026-07-22 8:37 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 3/6] dt-bindings: clock: qcom: Document Nord display clock controller Taniya Das
2026-07-22 2:28 ` Shawn Guo
2026-07-23 7:54 ` Krzysztof Kozlowski
2026-07-23 13:33 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 4/6] clk: qcom: Add Nord display clock controller support Taniya Das
2026-07-22 2:31 ` Shawn Guo
2026-07-22 8:32 ` Alexandre Mergnat
2026-07-24 10:19 ` Taniya Das [this message]
2026-07-21 7:07 ` [PATCH v2 5/6] dt-bindings: clock: qcom: Document Nord GPU clock controllers Taniya Das
2026-07-22 2:37 ` Shawn Guo
2026-07-24 10:20 ` Taniya Das
2026-07-23 7:55 ` Krzysztof Kozlowski
2026-07-24 10:20 ` Taniya Das
2026-07-23 13:33 ` Alexandre Mergnat
2026-07-21 7:07 ` [PATCH v2 6/6] clk: qcom: gpucc: Add Nord graphics clock controller support Taniya Das
2026-07-22 2:42 ` Shawn Guo
2026-07-23 13:33 ` Alexandre Mergnat
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