From: "Chang S. Bae" <chang.seok.bae@intel.com>
To: linux-kernel@vger.kernel.org
Cc: x86@kernel.org, tglx@kernel.org, mingo@redhat.com, bp@alien8.de,
dave.hansen@linux.intel.com, hpa@zytor.com,
andrew.cooper3@citrix.com, arjan.van.de.ven@intel.com,
sohil.mehta@intel.com, chang.seok.bae@intel.com,
stable@vger.kernel.org
Subject: [PATCH v3] x86/microcode/intel: Reject problematic loading on Granite Rapids systems
Date: Wed, 16 Sep 2026 22:59:39 +0000 [thread overview]
Message-ID: <20260916225939.1144524-1-chang.seok.bae@intel.com> (raw)
In-Reply-To: <20260908223209.916758-1-chang.seok.bae@intel.com>
Microcode updates can usually jump revisions. However, there is an
erratum on Granite Rapids systems. If they "jump over" revision
0x1000405, they result in #MC. Avoid it.
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: <stable@vger.kernel.org>
---
V2 -> V3:
* Shorten the changelog and rename the function (Boris)
* Reduce the code comment (Dave)
* Allow 0x1000405 loading. Thanks to Andrew, this fix got attention.
* Collect Dave review tag. Thanks, Dave!
Note:
* GNR98 currently describes loading 0x1000405 itself is unsafe, but it
will be updated to say okay with that. I will watch out the GNR98
changes.
* Jumping from < 0x1000380 to 0x1000405 was identified as an issue, but
0x1000380 is the first revision as GNR products. So loading 0x1000405
in production systems should be okay.
---
arch/x86/kernel/cpu/microcode/intel.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index 1142183c950c..30a22388d4b1 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -309,6 +309,26 @@ static void save_microcode_patch(struct microcode_intel *patch)
pr_err("Unable to allocate microcode memory size: %u\n", size);
}
+static bool revision_is_safe(struct cpu_signature *sig, u32 rev)
+{
+ u32 vfm = IFM(x86_family(sig->sig), x86_model(sig->sig));
+
+ /*
+ * Erratum GNR98 can cause #MC's if "jumping over" revision 0x1000405.
+ * Avoid the jumps.
+ */
+ if (vfm == INTEL_GRANITERAPIDS_X &&
+ x86_stepping(sig->sig) == 1 &&
+ sig->pf & 0x95 &&
+ sig->rev < 0x1000405 &&
+ rev > 0x1000405) {
+ pr_err_once("Erratum GNR98: skipping revision 0x%x.\n", rev);
+ return false;
+ }
+
+ return true;
+}
+
/* Scan blob for microcode matching the boot CPUs family, model, stepping */
static __init struct microcode_intel *scan_microcode(void *data, size_t size,
struct ucode_cpu_info *uci,
@@ -330,6 +350,9 @@ static __init struct microcode_intel *scan_microcode(void *data, size_t size,
if (!intel_find_matching_signature(data, &uci->cpu_sig))
continue;
+ if (!revision_is_safe(&uci->cpu_sig, mc_header->rev))
+ continue;
+
/*
* For saving the early microcode, find the matching revision which
* was loaded on the BSP.
@@ -878,6 +901,9 @@ static enum ucode_state parse_microcode_blobs(int cpu, struct iov_iter *iter)
if (!intel_find_matching_signature(mc, &uci->cpu_sig))
continue;
+ if (!revision_is_safe(&uci->cpu_sig, mc_header.rev))
+ continue;
+
is_safe = ucode_validate_minrev(&mc_header);
if (force_minrev && !is_safe)
continue;
--
2.53.0
next prev parent reply other threads:[~2026-09-16 23:26 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-01 23:16 [PATCH 0/8] x86/microcode: Address GNR errata and follow-up Chang S. Bae
2026-09-01 23:16 ` [PATCH 1/8] x86/microcode/intel: Reject problematic loading on GNR systems Chang S. Bae
2026-09-02 13:11 ` Sohil Mehta
2026-09-02 13:21 ` Van De Ven, Arjan
2026-09-08 23:03 ` Chang S. Bae
2026-09-02 14:23 ` Dave Hansen
2026-09-03 1:51 ` Borislav Petkov
2026-09-03 21:04 ` Chang S. Bae
2026-09-08 22:32 ` [PATCH v2] x86/microcode/intel: Reject problematic loading on Granite Rapids systems Chang S. Bae
2026-09-08 23:16 ` Dave Hansen
2026-09-09 0:13 ` Borislav Petkov
2026-09-09 0:39 ` Chang S. Bae
2026-09-09 0:14 ` Andrew Cooper
2026-09-16 22:59 ` Chang S. Bae [this message]
2026-09-17 9:14 ` [PATCH v3] " David Laight
2026-09-17 10:50 ` Andrew Cooper
2026-09-17 13:35 ` Van De Ven, Arjan
2026-09-17 17:52 ` Sohil Mehta
2026-09-17 18:11 ` Chang S. Bae
2026-09-17 18:43 ` Van De Ven, Arjan
2026-09-17 18:25 ` Chang S. Bae
2026-09-18 0:41 ` [tip: x86/urgent] " tip-bot2 for Chang S. Bae
2026-09-18 6:54 ` [PATCH v3] " Ingo Molnar
2026-09-18 15:37 ` Borislav Petkov
2026-10-20 18:09 ` Chang S. Bae
2026-09-01 23:16 ` [PATCH 2/8] x86/microcode: Solidify base_rev= option parsing Chang S. Bae
2026-09-01 23:16 ` [PATCH 3/8] x86/microcode: Accept a boolean for force_minrev parameter Chang S. Bae
2026-09-01 23:16 ` [PATCH 4/8] x86/microcode: Mark early_data __initdata Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 5/8] x86/microcode: Decouple minimum revision check from late loading Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 6/8] x86/microcode/intel: Apply minimum revision check to early loading Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 7/8] x86/microcode: Introduce iterative late loading Chang S. Bae
2026-09-01 23:16 ` [PATCH RFC 8/8] x86/microcode/intel: Select the lowest loadable revision for iterative loading Chang S. Bae
2026-09-08 23:07 ` [PATCH 0/8] x86/microcode: Address GNR errata and follow-up Chang S. Bae
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