From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [PATCH 08/12] perf/x86/intel: Delete dead NVL PEBS data-source init call
Date: Thu, 17 Sep 2026 09:52:30 +0800 [thread overview]
Message-ID: <20260917015234.981153-9-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20260917015234.981153-1-dapeng1.mi@linux.intel.com>
Nova Lake now uses the OMR data-source table for PEBS data-source
decoding and no longer depends on the legacy static pebs_data_source[]
mapping.
Remove the dead intel_pmu_pebs_data_source_lnl() initialization call
for NVL.
Fixes: c847a208f43b ("perf/x86/intel: Add core PMU support for Novalake")
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
---
arch/x86/events/intel/core.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 4bde7362d7b2..e6efd2a2ada6 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -8843,8 +8843,6 @@ __init int intel_pmu_init(void)
/* Initialize Atom core specific PerfMon capabilities.*/
pmu = &x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX];
intel_pmu_init_arw(&pmu->pmu);
-
- intel_pmu_pebs_data_source_lnl();
break;
default:
--
2.34.1
next prev parent reply other threads:[~2026-09-17 2:00 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-17 1:52 [PATCH 00/12] perf/x86/intel: PEBS data-source fixes and OMR updates Dapeng Mi
2026-09-17 1:52 ` [PATCH 01/12] perf/x86/intel: Fix GRT PEBS load/store direction for latency events Dapeng Mi
2026-09-17 1:52 ` [PATCH 02/12] perf/x86/intel: Fix CMT " Dapeng Mi
2026-09-17 1:52 ` [PATCH 03/12] perf/x86/intel: Fix DKT " Dapeng Mi
2026-09-17 1:52 ` [PATCH 04/12] perf/x86/intel: Update arw_latency_data() mem-op direction handling Dapeng Mi
2026-09-17 1:52 ` [PATCH 05/12] perf/x86/intel: Remove incorrect LionCove PEBS data-source constraints Dapeng Mi
2026-09-17 1:52 ` [PATCH 06/12] perf/x86/intel: Remove incorrect PantherCove " Dapeng Mi
2026-09-17 1:52 ` [PATCH 07/12] perf/x86/intel: Correct Panther cove data source snoop states Dapeng Mi
2026-09-17 1:52 ` Dapeng Mi [this message]
2026-09-17 1:52 ` [PATCH 09/12] perf/x86/intel: Constrain PantherCove UOPS_DISPATCHED events Dapeng Mi
2026-09-17 1:52 ` [PATCH 10/12] perf/x86/intel: Add precise OMR event support for DMR/NVL Dapeng Mi
2026-09-17 1:52 ` [PATCH 11/12] perf/x86/intel: Rename DMR offcore_rsp attribute to offmodule_rsp Dapeng Mi
2026-09-17 1:52 ` [PATCH 12/12] perf/x86/intel: Rename NVL " Dapeng Mi
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