From: Bjorn Helgaas <helgaas@kernel.org>
To: Lukas Wunner <lukas@wunner.de>
Cc: Kuppuswamy Sathyanarayanan
<sathyanarayanan.kuppuswamy@linux.intel.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org,
Rafael J Wysocki <rafael@kernel.org>,
Guixin Liu <kanie@linux.alibaba.com>,
Olof Johansson <olof@lixom.net>,
Terry Bowman <terry.bowman@amd.com>
Subject: Re: [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled
Date: Mon, 21 Sep 2026 14:01:25 -0500 [thread overview]
Message-ID: <20260921190125.GA1333298@bhelgaas> (raw)
In-Reply-To: <aq96cULSmdeBzd3D@wunner.de>
[+cc Terry, in case you have thoughts about native_cxl_error;
beginning of thread:
https://lore.kernel.org/all/20260919162655.3499010-1-sathyanarayanan.kuppuswamy@linux.intel.com]
On Sun, Sep 20, 2026 at 08:17:21AM +0200, Lukas Wunner wrote:
> On Sat, Sep 19, 2026 at 09:26:52AM -0700, Kuppuswamy Sathyanarayanan wrote:
> > +++ b/drivers/pci/probe.c
> > @@ -668,12 +668,14 @@ static void pci_init_host_bridge(struct pci_host_bridge *bridge)
> > * may implement its own AER handling and use _OSC to prevent the
> > * OS from interfering.
> > */
> > +#ifdef CONFIG_PCIEPORTBUS
> > bridge->native_aer = 1;
> > bridge->native_pcie_hotplug = 1;
> > - bridge->native_shpc_hotplug = 1;
> > bridge->native_pme = 1;
> > - bridge->native_ltr = 1;
> > bridge->native_dpc = 1;
> > +#endif
> > + bridge->native_ltr = 1;
> > + bridge->native_shpc_hotplug = 1;
> > bridge->domain_nr = PCI_DOMAIN_NR_NOT_SET;
>
> How about (e.g.)
>
> bridge->native_pcie_hotplug = IS_ENABLED(CONFIG_PCIEPORTBUS);
>
> instead of using #ifdef? That's the preferred style according to
> section 21 of Documentation/process/coding-style.rst
>
> > bridge->native_cxl_error = 1;
>
> Hm, this one depends on CONFIG_PCIEAER I believe.
> (But Terry Bowman is the expert.)
next prev parent reply other threads:[~2026-09-21 19:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-19 16:26 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
2026-09-19 16:26 ` [PATCH v13 1/5] PCI/DPC: Ignore devices with no AER Capability Kuppuswamy Sathyanarayanan
2026-09-20 6:11 ` Lukas Wunner
2026-09-21 16:43 ` Kuppuswamy Sathyanarayanan
2026-09-21 19:01 ` Bjorn Helgaas
2026-09-19 16:26 ` [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled Kuppuswamy Sathyanarayanan
2026-09-20 6:17 ` Lukas Wunner
2026-09-21 18:59 ` Kuppuswamy Sathyanarayanan
2026-09-21 19:01 ` Bjorn Helgaas [this message]
2026-09-19 16:26 ` [PATCH v13 3/5] PCI/ACPI: Tidy _OSC control bit checking Kuppuswamy Sathyanarayanan
2026-09-19 16:26 ` [PATCH v13 4/5] PCI/ACPI: Centralize pcie_ports_native checking Kuppuswamy Sathyanarayanan
2026-09-20 7:24 ` Guixin Liu
2026-09-21 20:41 ` Kuppuswamy Sathyanarayanan
2026-09-19 16:26 ` [PATCH v13 5/5] PCI: Centralize pci_aer_available() checking Kuppuswamy Sathyanarayanan
-- strict thread matches above, loose matches on Subject: below --
2021-01-23 1:11 [PATCH v13 0/5] Simplify PCIe native ownership Kuppuswamy Sathyanarayanan
2021-01-23 1:11 ` [PATCH v13 2/5] PCI: Assume control of portdrv-related features only when portdrv enabled Kuppuswamy Sathyanarayanan
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