From: Vishal Badole <Vishal.Badole@amd.com>
To: <bp@alien8.de>, <yazen.ghannam@amd.com>, <tony.luck@intel.com>,
<linux-edac@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Vishal Badole <Vishal.Badole@amd.com>
Subject: [PATCH Intenal 1/2] EDAC/amd64: Add support for AMD family 1Ah models 80h-8Fh
Date: Wed, 23 Sep 2026 16:50:02 +0530 [thread overview]
Message-ID: <20260923112003.3677719-2-Vishal.Badole@amd.com> (raw)
In-Reply-To: <20260923112003.3677719-1-Vishal.Badole@amd.com>
Add support for family 1Ah-based models 80h-8Fh.
Signed-off-by: Vishal Badole <Vishal.Badole@amd.com>
---
drivers/edac/amd64_edac.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index c6aa69dbd9fb..ff0ebc8e15f6 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -3900,6 +3900,10 @@ static int per_family_init(struct amd64_pvt *pvt)
pvt->max_mcs = 16;
pvt->flags.zn_regs_v2 = 1;
break;
+ case 0x80 ... 0x8f:
+ pvt->max_mcs = 2;
+ pvt->flags.zn_regs_v2 = 1;
+ break;
case 0x90 ... 0x9f:
case 0xa0 ... 0xaf:
pvt->max_mcs = 8;
--
2.34.1
next prev parent reply other threads:[~2026-09-23 11:20 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 11:20 [PATCH Intenal 0/2] EDAC/amd64: Add Family 1Ah Model 80h-8Fh support and fix csrow decode Vishal Badole
2026-09-23 11:20 ` Vishal Badole [this message]
2026-09-24 14:11 ` [PATCH Intenal 1/2] EDAC/amd64: Add support for AMD family 1Ah models 80h-8Fh Yazen Ghannam
2026-09-23 11:20 ` [PATCH Intenal 2/2] EDAC/amd64: Limit UMC csrow decode to the implemented chip selects Vishal Badole
2026-09-24 14:27 ` Yazen Ghannam
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