From: David Zhang <yidong.zhang@amd.com>
To: <quic_jhugo@quicinc.com>, <karol.wachowski@linux.intel.com>,
<max.zhen@amd.com>, <lizhi.hou@amd.com>, <ogabbay@kernel.org>,
<dri-devel@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Cc: David Zhang <yidong.zhang@amd.com>, <sonal.santan@amd.com>,
<mario.limonciello@amd.com>,
Hayden Laccabue <hayden.laccabue@amd.com>,
"Soham Donwalkar" <soham.donwalkar@amd.com>
Subject: [PATCH V0 07/21] accel/amdxdna: Add get and set power_mode for AIE4
Date: Fri, 25 Sep 2026 18:34:34 -0700 [thread overview]
Message-ID: <20260926013448.3840921-8-yidong.zhang@amd.com> (raw)
In-Reply-To: <20260926013448.3840921-1-yidong.zhang@amd.com>
Add power mode support for AIE4 devices via DRM_AMDXDNA_GET_INFO and
DRM_AMDXDNA_SET_STATE:
- Add AIE4_MSG_OP_POWER_OVERRIDE mailbox message definitions and
aie4_msg_set_power_mode() helper to send power mode commands to firmware.
- Support DRM_AMDXDNA_GET_POWER_MODE in aie4_get_info() to return the
cached device power mode.
- Implement aie4_set_power_mode() and aie4_set_state() to validate user
input, send the override command to firmware, and cache the mode in
ndev->pw_mode.
- Wire .set_aie_state into aie4_vf_ops and aie4_classic_ops.
Co-developed-by: Hayden Laccabue <hayden.laccabue@amd.com>
Signed-off-by: Hayden Laccabue <hayden.laccabue@amd.com>
Co-developed-by: Soham Donwalkar <soham.donwalkar@amd.com>
Signed-off-by: Soham Donwalkar <soham.donwalkar@amd.com>
Signed-off-by: David Zhang <yidong.zhang@amd.com>
---
drivers/accel/amdxdna/aie4_message.c | 14 +++++
drivers/accel/amdxdna/aie4_msg_priv.h | 9 +++
drivers/accel/amdxdna/aie4_pci.c | 88 +++++++++++++++++++++++++++
drivers/accel/amdxdna/aie4_pci.h | 3 +
4 files changed, 114 insertions(+)
diff --git a/drivers/accel/amdxdna/aie4_message.c b/drivers/accel/amdxdna/aie4_message.c
index 17cc335f0656..a7025995d0e0 100644
--- a/drivers/accel/amdxdna/aie4_message.c
+++ b/drivers/accel/amdxdna/aie4_message.c
@@ -156,3 +156,17 @@ int aie4_attach_work_buffer(struct amdxdna_dev_hdl *ndev)
return ret;
}
+
+int aie4_msg_set_power_mode(struct amdxdna_dev_hdl *ndev, u8 power_mode)
+{
+ DECLARE_AIE_MSG(aie4_msg_power_override, AIE4_MSG_OP_POWER_OVERRIDE);
+ int ret;
+
+ req.power_mode = power_mode;
+
+ ret = aie_send_mgmt_msg_wait(&ndev->aie, &msg);
+ if (ret)
+ return ret;
+
+ return 0;
+}
diff --git a/drivers/accel/amdxdna/aie4_msg_priv.h b/drivers/accel/amdxdna/aie4_msg_priv.h
index 81842fa1d6ce..4c06792df1bd 100644
--- a/drivers/accel/amdxdna/aie4_msg_priv.h
+++ b/drivers/accel/amdxdna/aie4_msg_priv.h
@@ -23,6 +23,7 @@ enum aie4_msg_opcode {
AIE4_MSG_OP_DESTROY_HW_CONTEXT = 0x30004,
AIE4_MSG_OP_AIE_TILE_INFO = 0x30006,
AIE4_MSG_OP_AIE_VERSION_INFO = 0x30007,
+ AIE4_MSG_OP_POWER_OVERRIDE = 0x3000B,
AIE4_MSG_OP_ATTACH_WORK_BUFFER = 0x40001,
};
@@ -187,6 +188,14 @@ struct aie4_msg_query_cert_firmware_version_resp {
__u16 host_queue_minor;
} __packed;
+struct aie4_msg_power_override_req {
+ __u32 power_mode;
+} __packed;
+
+struct aie4_msg_power_override_resp {
+ enum aie4_msg_status status;
+} __packed;
+
#define AIE4_WORK_BUFFER_MIN_SIZE SZ_4M
struct aie4_msg_attach_work_buffer_req {
diff --git a/drivers/accel/amdxdna/aie4_pci.c b/drivers/accel/amdxdna/aie4_pci.c
index aea3edd51b4f..3a063d3ffa94 100644
--- a/drivers/accel/amdxdna/aie4_pci.c
+++ b/drivers/accel/amdxdna/aie4_pci.c
@@ -4,6 +4,7 @@
*/
#include <drm/amdxdna_accel.h>
+#include <drm/drm_drv.h>
#include <drm/drm_managed.h>
#include <drm/drm_print.h>
#include <linux/firmware.h>
@@ -15,6 +16,7 @@
#include "amdxdna_mailbox.h"
#include "amdxdna_mailbox_helper.h"
#include "amdxdna_pci_drv.h"
+#include "amdxdna_pm.h"
#define NO_IOHUB 0
#define PSP_NOTIFY_INTR 0xD007BE11
@@ -528,6 +530,7 @@ static int aie4m_pcidev_init(struct amdxdna_dev *xdna)
ndev->priv = xdna->dev_info->dev_priv;
ndev->aie.xdna = xdna;
+ ndev->pw_mode = POWER_MODE_DEFAULT;
xdna->dev_handle = ndev;
xa_init_flags(&ndev->cert_comp_xa, XA_FLAGS_ALLOC);
@@ -582,6 +585,24 @@ static int aie4m_pcidev_init(struct amdxdna_dev *xdna)
return 0;
}
+static int aie4_get_power_mode(struct amdxdna_client *client,
+ struct amdxdna_drm_get_info *args)
+{
+ struct amdxdna_drm_get_power_mode mode = {};
+ struct amdxdna_dev *xdna = client->xdna;
+ struct amdxdna_dev_hdl *ndev;
+ u32 buf_sz;
+
+ ndev = xdna->dev_handle;
+ mode.power_mode = ndev->pw_mode;
+
+ buf_sz = min_t(u32, args->buffer_size, sizeof(mode));
+ if (copy_to_user(u64_to_user_ptr(args->buffer), &mode, buf_sz))
+ return -EFAULT;
+
+ return 0;
+}
+
static int aie4_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_info *args)
{
struct amdxdna_dev *xdna = client->xdna;
@@ -598,6 +619,9 @@ static int aie4_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i
case DRM_AMDXDNA_QUERY_FIRMWARE_VERSION:
ret = amdxdna_get_firmware_version(client, args, &xdna->fw_ver);
break;
+ case DRM_AMDXDNA_GET_POWER_MODE:
+ ret = aie4_get_power_mode(client, args);
+ break;
default:
XDNA_ERR(xdna, "Not supported request parameter %u", args->param);
ret = -EOPNOTSUPP;
@@ -608,6 +632,68 @@ static int aie4_get_info(struct amdxdna_client *client, struct amdxdna_drm_get_i
return ret;
}
+static int aie4_set_power_mode(struct amdxdna_client *client,
+ struct amdxdna_drm_set_state *args)
+{
+ struct amdxdna_drm_set_power_mode power_state;
+ struct amdxdna_dev *xdna = client->xdna;
+ struct amdxdna_dev_hdl *ndev = xdna->dev_handle;
+ u8 power_mode;
+ int ret;
+
+ if (copy_from_user(&power_state, u64_to_user_ptr(args->buffer),
+ sizeof(power_state))) {
+ XDNA_ERR(xdna, "Failed to copy power mode request into kernel");
+ return -EFAULT;
+ }
+
+ if (XDNA_MBZ_DBG(xdna, power_state.pad, sizeof(power_state.pad)))
+ return -EINVAL;
+
+ power_mode = power_state.power_mode;
+ if (power_mode > POWER_MODE_TURBO) {
+ XDNA_ERR(xdna, "Invalid power mode %d", power_mode);
+ return -EINVAL;
+ }
+
+ ret = aie4_msg_set_power_mode(xdna->dev_handle, power_mode);
+ if (ret)
+ return ret;
+
+ ndev->pw_mode = power_mode;
+ return 0;
+}
+
+static int aie4_set_state(struct amdxdna_client *client,
+ struct amdxdna_drm_set_state *args)
+{
+ struct amdxdna_dev *xdna = client->xdna;
+ int ret, idx;
+
+ if (!drm_dev_enter(&xdna->ddev, &idx))
+ return -ENODEV;
+
+ ret = amdxdna_pm_resume_get_locked(xdna);
+ if (ret)
+ goto dev_exit;
+
+ switch (args->param) {
+ case DRM_AMDXDNA_SET_POWER_MODE:
+ ret = aie4_set_power_mode(client, args);
+ break;
+ default:
+ XDNA_ERR(xdna, "Not supported request parameter %u", args->param);
+ ret = -EOPNOTSUPP;
+ break;
+ }
+
+ amdxdna_pm_suspend_put(xdna);
+
+dev_exit:
+ drm_dev_exit(idx);
+ return ret;
+}
+
static int aie4_alloc_work_buffer(struct amdxdna_dev_hdl *ndev)
{
struct amdxdna_dev *xdna = ndev->aie.xdna;
@@ -730,6 +816,7 @@ const struct amdxdna_dev_ops aie4_vf_ops = {
.hwctx_fini = aie4_hwctx_fini,
.cmd_wait = aie4_cmd_wait,
.get_aie_info = aie4_get_info,
+ .set_aie_state = aie4_set_state,
};
const struct amdxdna_dev_ops aie4_classic_ops = {
@@ -739,4 +826,5 @@ const struct amdxdna_dev_ops aie4_classic_ops = {
.hwctx_fini = aie4_hwctx_fini,
.cmd_wait = aie4_cmd_wait,
.get_aie_info = aie4_get_info,
+ .set_aie_state = aie4_set_state,
};
diff --git a/drivers/accel/amdxdna/aie4_pci.h b/drivers/accel/amdxdna/aie4_pci.h
index 5ae5e8427a3b..98b637279257 100644
--- a/drivers/accel/amdxdna/aie4_pci.h
+++ b/drivers/accel/amdxdna/aie4_pci.h
@@ -58,6 +58,8 @@ struct amdxdna_dev_hdl {
dma_addr_t work_buf_addr;
u32 work_buf_size;
+ u8 pw_mode;
+
struct amdxdna_drm_query_firmware_version cert_version;
};
@@ -77,6 +79,7 @@ int aie4_query_npu_firmware_version(struct amdxdna_dev_hdl *ndev,
struct amdxdna_drm_query_firmware_version *fw_version);
int aie4_query_cert_firmware_version(struct amdxdna_dev_hdl *ndev,
struct amdxdna_drm_query_firmware_version *cert_version);
+int aie4_msg_set_power_mode(struct amdxdna_dev_hdl *ndev, u8 power_mode);
u32 aie4_msg_pasid(struct amdxdna_client *client);
/* aie4_ctx.c */
--
2.34.1
next prev parent reply other threads:[~2026-09-26 1:36 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-26 1:34 [PATCH V0 00/21] accel/amdxdna: Kernel submission and PM " David Zhang
2026-09-26 1:34 ` [PATCH V0 01/21] accel/amdxdna: Rename NPU3 firmware files David Zhang
2026-09-26 1:34 ` [PATCH V0 02/21] accel/amdxdna: Remove mmap for doorbell David Zhang
2026-09-26 1:34 ` [PATCH V0 03/21] accel/amdxdna: Add CERT firmware version support David Zhang
2026-09-26 1:34 ` [PATCH V0 04/21] accel/amdxdna: Upgrade firmware version to 6.0 David Zhang
2026-09-28 17:08 ` Lizhi Hou
2026-09-26 1:34 ` [PATCH V0 05/21] accel/amdxdna: Add NPU3 classic device support David Zhang
2026-09-26 1:34 ` [PATCH V0 06/21] accel/amdxdna: Add AIE version query to aie4_get_info David Zhang
2026-09-26 1:34 ` David Zhang [this message]
2026-09-28 18:39 ` [PATCH V0 07/21] accel/amdxdna: Add get and set power_mode for AIE4 Lizhi Hou
2026-09-26 1:34 ` [PATCH V0 08/21] accel/amdxdna: Restore power mode override on AIE4 hardware start David Zhang
2026-09-28 18:48 ` Lizhi Hou
2026-09-26 1:34 ` [PATCH V0 09/21] accel/amdxdna: Add clock, DPM frequency, and resource info queries for AIE4 David Zhang
2026-09-26 1:34 ` [PATCH V0 10/21] accel/amdxdna: Add context switch hysteresis with debugfs control David Zhang
2026-09-26 1:34 ` [PATCH V0 11/21] accel/amdxdna: Refactor AIE4 hardware initialization sequence David Zhang
2026-09-26 1:34 ` [PATCH V0 12/21] accel/amdxdna: Decouple AIE4 doorbell and MSI-X notification transport hooks David Zhang
2026-09-28 20:16 ` Lizhi Hou
2026-09-26 1:34 ` [PATCH V0 13/21] accel/amdxdna: Implement AIE4 kernel queue lifecycle and memory layout David Zhang
2026-09-26 1:34 ` [PATCH V0 14/21] accel/amdxdna: Fix fence timeline name and context allocation David Zhang
2026-09-28 21:06 ` Lizhi Hou
2026-09-30 0:20 ` Zhang, Yidong (David)
2026-09-26 1:34 ` [PATCH V0 15/21] accel/amdxdna: Prepare for AIE4 command submission David Zhang
2026-09-26 1:34 ` [PATCH V0 16/21] accel/amdxdna: Implement AIE4 command packet building and submission David Zhang
2026-09-26 1:34 ` [PATCH V0 17/21] accel/amdxdna: Finalize runtime PM before acquiring dev_lock on removal David Zhang
2026-09-26 1:34 ` [PATCH V0 18/21] accel/amdxdna: Implement AIE4 suspend and resume David Zhang
2026-09-26 1:34 ` [PATCH V0 19/21] accel/amdxdna: Link SR-IOV VFs for power management sequencing David Zhang
2026-09-26 1:34 ` [PATCH V0 20/21] accel/amdxdna: Implement runtime suspend and resume support David Zhang
2026-09-26 1:34 ` [PATCH V0 21/21] accel/amdxdna: Add stub hwctx_config for AIE4 David Zhang
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