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From: Conor Dooley <conor@kernel.org>
To: Jisheng Zhang <jszhang@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Brian Masney <bmasney+clk@redhat.com>,
	Jerome Brunet <jbrunet+clk@baylibre.com>,
	Andi Shyti <andi.shyti@kernel.org>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Frank Li <Frank.Li@nxp.com>, Lee Jones <lee@kernel.org>,
	Linus Walleij <linusw@kernel.org>,
	Liam Girdwood <lgirdwood@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-i2c@vger.kernel.org,
	linux-i3c@lists.infradead.org, mfd@lists.linux.dev,
	linux-gpio@vger.kernel.org, linux-serial@vger.kernel.org,
	linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 17/20] dt-bindings: mfd: Add Synaptics SL261x global block binding
Date: Tue, 29 Sep 2026 20:55:00 +0100	[thread overview]
Message-ID: <20260929-handyman-penalize-0c5cbf13c5fd@spud> (raw)
In-Reply-To: <20260929061417.20733-18-jszhang@kernel.org>

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On Tue, Sep 29, 2026 at 02:14:14PM +0800, Jisheng Zhang wrote:
> Document the AVIO global, CPU wrapper, chip control, and MCU global
> register blocks on SL261x SoCs. Each block exposes its clock and, where
> applicable, pinctrl and reset functions through child nodes.
> 
> Document the chip control syscon phandle used by the CPU clock
> controller.
> 
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
> ---
>  .../bindings/mfd/syna,sl261x-gbl.yaml         | 208 ++++++++++++++++++
>  1 file changed, 208 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/mfd/syna,sl261x-gbl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/mfd/syna,sl261x-gbl.yaml b/Documentation/devicetree/bindings/mfd/syna,sl261x-gbl.yaml

Filename should match a compatible.

> new file mode 100644
> index 000000000000..3e5842169c4a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/syna,sl261x-gbl.yaml
> @@ -0,0 +1,208 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/syna,sl261x-gbl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Synaptics SL261x global and control register blocks
> +
> +maintainers:
> +  - Jisheng Zhang <jszhang@kernel.org>
> +
> +description: |
> +  The SL261x global and control register blocks contain clock, reset, and
> +  pin control registers. Each functional child uses its parent's register
> +  range. The CPU clock controller also refers to the chip control syscon.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: syna,sl261x-avio-gbl
> +          - const: syscon
> +          - const: simple-mfd
> +      - items:
> +          - const: syna,sl261x-cpu-wrp
> +          - const: syscon
> +          - const: simple-mfd
> +      - items:
> +          - const: syna,sl261x-chip-control
> +          - const: syscon
> +          - const: simple-mfd
> +      - items:
> +          - const: syna,sl261x-mcu-gbl
> +          - const: syscon
> +          - const: simple-mfd

This can be simplified significantly by using an enum for the variable
part.

> +
> +  reg:
> +    maxItems: 1
> +
> +  clock:
> +    type: object
> +    additionalProperties: true
> +
> +  pin-controller:
> +    type: object
> +    additionalProperties: true
> +
> +  reset:
> +    type: object
> +    additionalProperties: true
> +
> +required:
> +  - compatible
> +  - reg
> +

> +allOf:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: syna,sl261x-avio-gbl
> +    then:
> +      required:
> +        - clock
> +      properties:
> +        clock:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-aio-clk
> +        pin-controller: false
> +        reset: false
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: syna,sl261x-cpu-wrp
> +    then:
> +      required:
> +        - clock
> +      properties:
> +        clock:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-cpu-clk
> +        pin-controller: false
> +        reset: false
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: syna,sl261x-chip-control
> +    then:
> +      required:
> +        - clock
> +        - pin-controller
> +        - reset
> +      properties:
> +        clock:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-soc-clk
> +        pin-controller:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-soc-pinctrl
> +        reset:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-soc-reset
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: syna,sl261x-mcu-gbl
> +    then:
> +      required:
> +        - clock
> +        - pin-controller
> +        - reset
> +      properties:
> +        clock:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-system-clk
> +        pin-controller:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-system-pinctrl
> +        reset:
> +          properties:
> +            compatible:
> +              const: syna,sl261x-system-reset

Most of this can just disappear because most of these subnodes don't need to
exist. In fact, maybe all of them can be removed, leaving you just with
the syscon nodes themselves containing the relevant properties for
resets/clocks/pinctrl.

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    osc: clock-osc {
> +        compatible = "fixed-clock";
> +        #clock-cells = <0>;
> +        clock-frequency = <25000000>;
> +    };

Nodes like this will get simulated by the tooling, they're not needed
here.

> +
> +    avio_gbl: avio-gbl@f7490000 {
> +        compatible = "syna,sl261x-avio-gbl", "syscon", "simple-mfd";
> +        reg = <0xf7490000 0x4000>;
> +
> +        aioclk: clock {
> +            compatible = "syna,sl261x-aio-clk";
> +            #clock-cells = <1>;
> +            clocks = <&osc>;
> +        };
> +    };
> +
> +    chip: chip-control@f7e10000 {
> +        compatible = "syna,sl261x-chip-control", "syscon", "simple-mfd";
> +        reg = <0xf7e10000 0x10000>;
> +
> +        clk: clock {
> +            compatible = "syna,sl261x-soc-clk";
> +            #clock-cells = <1>;
> +            clocks = <&osc>;
> +        };
> +
> +        pinctrl: pin-controller {
> +            compatible = "syna,sl261x-soc-pinctrl";
> +        };
> +
> +        rst: reset {
> +            compatible = "syna,sl261x-soc-reset";
> +            #reset-cells = <1>;
> +        };
> +    };
> +
> +    cpu_wrp: cpu-wrp@f7e30000 {

Please don't make up new node names for your device, use something
established like "system-controller" or "syscon" please.

pw-bot: changes-requested

Thanks,
Conor.

> +        compatible = "syna,sl261x-cpu-wrp", "syscon", "simple-mfd";
> +        reg = <0xf7e30000 0x4000>;
> +
> +        cpuclk: clock {
> +            compatible = "syna,sl261x-cpu-clk";
> +            #clock-cells = <1>;
> +            clocks = <&osc>;
> +            syna,gbl-syscon = <&chip>;
> +        };
> +    };
> +
> +    mcu_gbl: mcu-gbl@e5025000 {
> +        compatible = "syna,sl261x-mcu-gbl", "syscon", "simple-mfd";
> +        reg = <0xe5025000 0x1000>;
> +
> +        sm_clk: clock {
> +            compatible = "syna,sl261x-system-clk";
> +            #clock-cells = <1>;
> +        };
> +
> +        sm_pinctrl: pin-controller {
> +            compatible = "syna,sl261x-system-pinctrl";
> +        };
> +
> +        sm_rst: reset {
> +            compatible = "syna,sl261x-system-reset";
> +            #reset-cells = <1>;
> +        };
> +    };
> +...
> -- 
> 2.53.0
> 

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  reply	other threads:[~2026-09-29 19:55 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-29  6:13 [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Jisheng Zhang
2026-09-29  6:13 ` [PATCH 01/20] dt-bindings: serial: snps-dw-apb-uart: Add Synaptics sl261x uart Jisheng Zhang
2026-09-29  6:13 ` [PATCH 02/20] dt-bindings: i2c: dw: Add Synaptics sl261x i2c Jisheng Zhang
2026-09-29 20:57   ` Andi Shyti
2026-09-29  6:14 ` [PATCH 03/20] spi: dt-bindings: snps,dw-apb-ssi: Add Synaptics sl261x spi Jisheng Zhang
2026-09-29  6:14 ` [PATCH 04/20] dt-bindings: i3c: dw: support up to two reset lines Jisheng Zhang
2026-09-29 19:40   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 05/20] i3c: dw: switch to array-based exclusive reset control Jisheng Zhang
2026-09-29 15:01   ` Frank Li
2026-09-29  6:14 ` [PATCH 06/20] dt-bindings: i3c: Add Synaptics sl261x i3c Jisheng Zhang
2026-09-29  6:14 ` [PATCH 07/20] arm64: kconfig: let ARCH_BERLIN cover Synaptics arm64 SoCs Jisheng Zhang
2026-09-29  6:14 ` [PATCH 08/20] dt-bindings: reset: add Synaptics SL261X SoCs Jisheng Zhang
2026-09-29 19:44   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 09/20] reset: add Synaptics SL261x reset support Jisheng Zhang
2026-09-29  6:14 ` [PATCH 10/20] pinctrl: berlin: use u16 instead of u8 for the offset Jisheng Zhang
2026-09-29  6:14 ` [PATCH 11/20] pinctrl: berlin: enable module build support Jisheng Zhang
2026-09-29  6:14 ` [PATCH 12/20] pinctrl: berlin: add optional pinconf support Jisheng Zhang
2026-09-29  6:14 ` [PATCH 13/20] dt-bindings: pinctrl: berlin: Support Synaptics SL261X SoCs Jisheng Zhang
2026-09-29  6:14 ` [PATCH 14/20] pinctrl: berlin: support " Jisheng Zhang
2026-09-29 15:34   ` Uwe Kleine-König
2026-09-29  6:14 ` [PATCH 15/20] dt-bindings: clock: add Synaptics SL261X clock Jisheng Zhang
2026-09-29 19:46   ` Conor Dooley
2026-09-29 20:49   ` Rob Herring (Arm)
2026-09-29  6:14 ` [PATCH 16/20] clk: berlin: add Synaptics SL261X SoC clocks and plls Jisheng Zhang
2026-09-29  6:14 ` [PATCH 17/20] dt-bindings: mfd: Add Synaptics SL261x global block binding Jisheng Zhang
2026-09-29 19:55   ` Conor Dooley [this message]
2026-09-29  6:14 ` [PATCH 18/20] regulator: dt-bindings: sy8827n: support standard properties Jisheng Zhang
2026-09-29 19:40   ` Conor Dooley
2026-09-29  6:14 ` [PATCH 19/20] dt-bindings: arm: berlin: Add Synaptics SL261X SoC and RDK board Jisheng Zhang
2026-09-29  6:14 ` [PATCH 20/20] arm64: dts: synaptics: " Jisheng Zhang
2026-09-29 19:38 ` [PATCH 00/20] arm64: add Synaptics SL261X SoCs and RDK boards Conor Dooley

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