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From: Shrikanth Hegde <sshegde@linux.ibm.com>
To: maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org,
	peterz@infradead.org, tim.c.chen@linux.intel.com
Cc: sshegde@linux.ibm.com, christophe.leroy@csgroup.eu,
	linux-kernel@vger.kernel.org, ritesh.list@gmail.com,
	kprateek.nayak@amd.com, yu.c.chen@intel.com,
	vineethr@linux.ibm.com, vincent.guittot@linaro.org,
	srikar@linux.ibm.com, npiggin@gmail.com, mpe@ellerman.id.au
Subject: [PATCH 1/4] powerpc/topology: Introduce llc_override debug knob
Date: Mon, 12 Oct 2026 15:50:34 +0530	[thread overview]
Message-ID: <20261012102037.2477378-2-sshegde@linux.ibm.com> (raw)
In-Reply-To: <20261012102037.2477378-1-sshegde@linux.ibm.com>

There is a new feature in scheduler called as Cache Aware Scheduling.
It tries to keep related tasks within the same LLC domain while
keeping the system reasonably balanced.

Cache Aware Scheduling assumes that the scheduler LLC domain is large
enough to be a useful placement target. This is true on many systems
where an LLC spans several cores, but not on PowerPC systems where the
scheduler-visible LLC is at the SMT level.
In that case, sd_llc_size is effectively the SMT width.

This becomes visible in the capacity check:

  !fits_capacity((mm->sc_stat.nr_running_avg * cpu_smt_num_threads),
                  scale * per_cpu(sd_llc_size, cpu));

As a result, it may be enabled but has no room to operate.
Hence provide a debugfs option one can set to try experiment their
workload with cache aware scheduling. This also provides ways to explore
it on system with SMT=4 to see if there are any opportunities
to improve or uncover bugs if there is any.

This does not change the hardware cache topology. It only changes the
sched-domain level at which SD_SHARE_LLC is set.

Initially start with,
- New debugs file called llc_override. It can be set/get on
  /sys/kernel/debug/powerpc/llc_override
- Adds parser logic for the debug knob.

There is no point in setting NUMA as the LLC domain. So give option
until pkg to experiment with.

Actual flag manipulations and rebuilding sched domains are introduced
in subsequent patches.

Signed-off-by: Shrikanth Hegde <sshegde@linux.ibm.com>
---
PS: Split is deliberate. If squashing all this into one patch helps,
    let me know.

 arch/powerpc/kernel/smp.c | 90 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 6a5a5469aaae..433757511adb 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -36,6 +36,7 @@
 #include <linux/pgtable.h>
 #include <linux/clockchips.h>
 #include <linux/kexec.h>
+#include <linux/debugfs.h>
 
 #include <asm/ptrace.h>
 #include <linux/atomic.h>
@@ -1826,3 +1827,92 @@ void __noreturn arch_cpu_idle_dead(void)
 }
 
 #endif
+
+enum llc_override_values {
+	LLC_OVERRIDE_DISABLED,
+	LLC_OVERRIDE_SMT,
+	LLC_OVERRIDE_MC,
+	LLC_OVERRIDE_PKG,
+};
+
+static int llc_override;
+static int llc_override_changed;
+static DEFINE_MUTEX(llc_override_mutex);
+
+static const char * const llc_override_str[] = {
+	[LLC_OVERRIDE_DISABLED]	= "0",
+	[LLC_OVERRIDE_SMT]	= "smt",
+	[LLC_OVERRIDE_MC]	= "mc",
+	[LLC_OVERRIDE_PKG]	= "pkg",
+};
+
+static ssize_t llc_override_get(struct file *file, char __user *ubuf,
+				size_t count, loff_t *ppos)
+{
+	int override;
+	char buf[8];
+	int len;
+
+	override = READ_ONCE(llc_override);
+	len = scnprintf(buf, sizeof(buf), "%s\n", llc_override_str[override]);
+	return simple_read_from_buffer(ubuf, count, ppos, buf, len);
+}
+
+static ssize_t llc_override_set(struct file *file, const char __user *ubuf,
+				size_t count, loff_t *ppos)
+{
+	char buf[8];
+	int override;
+
+	if (!count || count >= sizeof(buf))
+		return -EINVAL;
+
+	if (copy_from_user(buf, ubuf, count))
+		return -EFAULT;
+
+	buf[count] = '\0';
+	strim(buf);
+
+	if (!strcmp(buf, "0"))
+		override = LLC_OVERRIDE_DISABLED;
+	else if (!strcasecmp(buf, "smt"))
+		override = LLC_OVERRIDE_SMT;
+	else if (!strcasecmp(buf, "mc"))
+		override = LLC_OVERRIDE_MC;
+	else if (!strcasecmp(buf, "pkg"))
+		override = LLC_OVERRIDE_PKG;
+	else
+		return -EINVAL;
+
+	if (override == LLC_OVERRIDE_MC && !has_coregroup_support())
+		return -EINVAL;
+
+	mutex_lock(&llc_override_mutex);
+
+	if (override != READ_ONCE(llc_override)) {
+		WRITE_ONCE(llc_override, override);
+		WRITE_ONCE(llc_override_changed, 1);
+		pr_info("sched LLC override set to %s\n",
+			llc_override_str[override]);
+
+		/* Will be calling rebuild sched domain in later patches */
+	}
+
+	mutex_unlock(&llc_override_mutex);
+	return count;
+}
+
+static const struct file_operations llc_override_fops = {
+	.open		= simple_open,
+	.read		= llc_override_get,
+	.write		= llc_override_set,
+	.llseek		= default_llseek,
+};
+
+static __init int llc_override_debugfs_init(void)
+{
+	debugfs_create_file("llc_override", 0600, arch_debugfs_dir, NULL,
+			    &llc_override_fops);
+	return 0;
+}
+device_initcall(llc_override_debugfs_init);
-- 
2.52.0


  reply	other threads:[~2026-10-12 10:21 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-12 10:20 [PATCH 0/4] powerpc/topology: Introduce llc_override debugfs Shrikanth Hegde
2026-10-12 10:20 ` Shrikanth Hegde [this message]
2026-10-12 12:14   ` [PATCH 1/4] powerpc/topology: Introduce llc_override debug knob Srikar Dronamraju
2026-10-12 14:10     ` Shrikanth Hegde
2026-10-12 10:20 ` [PATCH 2/4] powerpc/topology: Add docs for llc_override Shrikanth Hegde
2026-10-12 10:20 ` [PATCH 3/4] powerpc/topology: Update mc/pkg flags based on llc_override Shrikanth Hegde
2026-10-12 10:20 ` [PATCH 4/4] powerpc/topology: Rebuild sched domains on llc_override change Shrikanth Hegde
2026-10-12 12:19 ` [PATCH 0/4] powerpc/topology: Introduce llc_override debugfs Srikar Dronamraju
2026-10-12 14:14   ` Shrikanth Hegde
2026-10-12 21:15 ` Tim Chen

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