From: Leo Yan <leo.yan@arm.com>
To: Michal Simek <michal.simek@amd.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
Mike Leach <mike.leach@arm.com>,
James Clark <james.clark@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>,
Wei Xu <xuwei5@hisilicon.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH 1/5] dt-bindings: arm: coresight: Limit static replicator to atclk
Date: Mon, 12 Oct 2026 17:28:51 +0100 [thread overview]
Message-ID: <20261012162851.GB26205@e132581.arm.com> (raw)
In-Reply-To: <1128f456-ed6e-47ee-8dda-157af99cc404@amd.com>
On Mon, Oct 12, 2026 at 02:35:37PM +0200, Michal Simek wrote:
>
>
> On 10/2/26 17:07, Leo Yan wrote:
> > Static replicators have no programmable registers and need no APB
> > programming clock.
> >
> > The Zynq clock controller registers dbg_trc and dbg_apb and calls
> > clk_prepare_enable() for each gate the bootloader left on.
>
> That's one bootloader behavior. If there is another bootloader that clocks
> can be simply disabled. I don't think there is any reason to depends on
> bootloader behavior. If there are clocks which has to be ON I can't see any
> reason not to drive them.
My reference to zynq_clk_setup() was to explain that this patch leaves
the existing management of dbg_trc and dbg_apb unchanged.
The CoreSight drivers do not request clocks named "dbg_trc" or "dbg_apb".
And removing those unused clock properties introduces no additional
dependence on the bootloader. Could you clarify how retaining these
entries addresses the bootloader concern?
> TRM page 741
>
> Trace Port Clock The trace port clock is used to clock the TPIU and trace
> buffer when the MIO interface is chosen and must be twice the frequency of
> the desired TPIU clock. The TPIU clock frequency must be chosen to be fast
> enough to allow the trace port to keep up with the amount of data being
> traced, but slow enough to meet the dynamic characteristics of the data
> output buffers of the TPIU.
The quoted paragraph establishes a trace-clock requirement for the TPIU
and trace buffer, how does it identify the clock inputs of the funnel
and replicator?
Thanks,
Leo
next prev parent reply other threads:[~2026-10-12 16:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-02 15:07 [PATCH 0/5] arm: coresight: Clean up funnel and replicator clocks Leo Yan
2026-10-02 15:07 ` [PATCH 1/5] dt-bindings: arm: coresight: Limit static replicator to atclk Leo Yan
2026-10-05 17:40 ` Rob Herring (Arm)
2026-10-12 12:35 ` Michal Simek
2026-10-12 16:28 ` Leo Yan [this message]
2026-10-02 15:07 ` [PATCH 2/5] dt-bindings: arm: coresight: Allow atclk for static funnel Leo Yan
2026-10-05 17:41 ` Rob Herring (Arm)
2026-10-02 15:07 ` [PATCH 3/5] arm64: dts: hisilicon: Drop PCLK from static CoreSight links Leo Yan
2026-10-09 1:04 ` Wei Xu
2026-10-02 15:07 ` [PATCH 4/5] ARM: dts: zynq: Use dynamic CoreSight funnel and trim clocks Leo Yan
2026-10-12 12:37 ` Michal Simek
2026-10-02 15:07 ` [PATCH 5/5] ARM: dts: qcom: apq8064: Drop PCLK from static replicator Leo Yan
2026-10-02 15:21 ` Dmitry Baryshkov
2026-10-02 15:33 ` Leo Yan
2026-10-02 16:05 ` Dmitry Baryshkov
2026-10-05 14:47 ` Leo Yan
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