[RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family designs connect the SW_CTRL output to a GPIO on the
application processor. On Shikra, the WCN3988 SW_CTRL signal is connected
to GPIO88 and is used through the MGPI/AOSS hardware path to request the
required RF clocks.

Qualcomm downstream kernels configure this path through
msm_gpio_mpm_wake_set(), but upstream does not provide an equivalent API.
This series models SW_CTRL as a dedicated wake IRQ. Requesting the GPIO IRQ
resource enables POWER_SAVE_WAKEUP_ENABLE in Qualcomm TLMM when
WAKEUP_PRESENT is advertised, while the PM core keeps the IRQ disabled
during normal operation and arms it for system suspend.

This is an RFC because the intended hardware and software model still
needs confirmation. In particular, please advise whether SW_CTRL should
be represented as an AP wake source using dev_pm_set_dedicated_wake_irq(),
or whether Linux only needs an interface to explicitly configure the
TLMM/MGPI power-save path.

The series documents the named wakeup interrupt for the WCN PMU binding,
implements dedicated wake IRQ handling in the Qualcomm WCN power
sequencer, and enables it on the Shikra CQM, CQS and IQS EVKs. On this
base, CQM and CQS share shikra-cqm-som.dtsi, while IQS uses
shikra-iqs-som.dtsi.

Testing:
- scripts/checkpatch.pl --strict: passed
- dt-binding-check: passed
- dtb-check: passed
- sparse-check: passed
- Shikra CQM, CQS and IQS DTB builds: passed
- QIPL validation of the equivalent qcom-6.18.y implementation: passed

An earlier experiment confirmed that requesting GPIO88 as an IRQ changes
TLMM_GPIO_INTR_CFG88 from 0x942 to 0x9c2, setting
POWER_SAVE_WAKEUP_ENABLE.

Linghui Wu (3):
  dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
  power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
  arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

 .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 ++++++++++++++
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  4 +++
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  4 +++
 drivers/power/sequencing/pwrseq-qcom-wcn.c    | 30 +++++++++++++++++++
 4 files changed, 60 insertions(+)


base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a
-- 
2.43.0

[RFC PATCH 1/3] dt-bindings: power: sequencing: qcom-wcn: document wakeup-source

[Linghui Wu]

Some WCN3990-family designs connect SW_CTRL to an interrupt capable of
waking the application processor.

Document the dedicated "wakeup" interrupt and wakeup-source property for
the WCN PMU node.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
index 9a7abc878b8..00cd8b6c27d 100644
--- a/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
+++ b/Documentation/devicetree/bindings/regulator/qcom,wcn3990-pmu.yaml
@@ -42,6 +42,20 @@ properties:
     maxItems: 1
     description: GPIO line indicating the state of the clock supply to the BT module
 
+  interrupts:
+    maxItems: 1
+    description: SW_CTRL wake interrupt, asserted when the WCN chip is active
+
+  interrupt-names:
+    const: wakeup
+
+  wakeup-source:
+    type: boolean
+    description:
+      Mark the PMU as a wakeup source. Requires the "wakeup" interrupt to be
+      present. When set, the SW_CTRL IRQ is used to wake the application
+      processor from system suspend.
+
   clocks:
     maxItems: 1
     description: Reference clock handle
@@ -67,6 +81,14 @@ required:
   - vddrf-supply
   - vddch0-supply
 
+dependencies:
+  wakeup-source:
+    required:
+      - interrupt-names
+    anyOf:
+      - required: [interrupts]
+      - required: [interrupts-extended]
+
 additionalProperties: false
 
 examples:
-- 
2.43.0

[RFC PATCH 2/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Linghui Wu]

Some WCN3990-family designs route SW_CTRL to an interrupt capable of
waking the application processor. Requesting the IRQ resource also enables
the Qualcomm TLMM power-save wakeup path when WAKEUP_PRESENT is advertised.

When the PMU is marked as a wakeup source, retrieve the dedicated "wakeup"
interrupt and register it as a dedicated wake IRQ. Keep it disabled during
normal operation and let the PM core arm it for system suspend.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 drivers/power/sequencing/pwrseq-qcom-wcn.c | 30 ++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/drivers/power/sequencing/pwrseq-qcom-wcn.c b/drivers/power/sequencing/pwrseq-qcom-wcn.c
index d41793e1fcd..e052187ffb9 100644
--- a/drivers/power/sequencing/pwrseq-qcom-wcn.c
+++ b/drivers/power/sequencing/pwrseq-qcom-wcn.c
@@ -11,6 +11,8 @@
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/platform_device.h>
+#include <linux/pm_wakeirq.h>
+#include <linux/pm_wakeup.h>
 #include <linux/property.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pwrseq/provider.h>
@@ -454,11 +456,17 @@ static int pwrseq_qcom_wcn3990_match(struct pwrseq_device *pwrseq,
 	return pwrseq_qcom_wcn_match_regulator(pwrseq, dev, "vdd-1.8-xo-supply");
 }
 
+static void pwrseq_qcom_wcn_clear_wake_irq(void *data)
+{
+	dev_pm_clear_wake_irq(data);
+}
+
 static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
 	struct pwrseq_qcom_wcn_ctx *ctx;
 	struct pwrseq_config config;
+	int wake_irq;
 	int i, ret;
 
 	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
@@ -496,6 +504,28 @@ static int pwrseq_qcom_wcn_probe(struct platform_device *pdev)
 		return dev_err_probe(dev, PTR_ERR(ctx->bt_gpio),
 				     "Failed to get the Bluetooth enable GPIO\n");
 
+	if (device_property_read_bool(dev, "wakeup-source")) {
+		wake_irq = platform_get_irq_byname(pdev, "wakeup");
+		if (wake_irq < 0)
+			return dev_err_probe(dev, wake_irq,
+					     "Failed to get the SW_CTRL wake IRQ\n");
+
+		ret = devm_device_init_wakeup(dev);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to enable wakeup\n");
+
+		ret = dev_pm_set_dedicated_wake_irq(dev, wake_irq);
+		if (ret)
+			return dev_err_probe(dev, ret,
+					     "Failed to set the SW_CTRL wake IRQ\n");
+
+		ret = devm_add_action_or_reset(dev,
+					       pwrseq_qcom_wcn_clear_wake_irq, dev);
+		if (ret)
+			return ret;
+	}
+
 	/*
 	 * FIXME: This should actually be GPIOD_OUT_LOW, but doing so would
 	 * cause the WLAN power to be toggled, resulting in PCIe link down.
-- 
2.43.0

[RFC PATCH 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

[Linghui Wu]

Configure the WCN power sequencer SW_CTRL signal as a named wake IRQ and
mark it as a wakeup source. The CQM SOM DTSI is shared by the CQM and CQS
EVKs, while the IQS EVK uses the IQS SOM DTSI.

Signed-off-by: Linghui Wu <linghui.wu@oss.qualcomm.com>
---
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi | 4 ++++
 arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
index 8ac42ff625a..c08fe15a91c 100644
--- a/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 #include "shikra.dtsi"
@@ -39,6 +40,9 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "wakeup";
+		wakeup-source;
 
 		vddio-supply = <&pm4125_l7>;
 		vddxo-supply = <&pm4125_l13>;
diff --git a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
index 4ff97945274..e16eeb15a23 100644
--- a/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi
@@ -4,6 +4,7 @@
  */
 
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 #include "shikra.dtsi"
@@ -46,6 +47,9 @@ wcn3988-pmu {
 		pinctrl-names = "default";
 
 		swctrl-gpios = <&tlmm 88 GPIO_ACTIVE_HIGH>;
+		interrupts-extended = <&tlmm 88 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "wakeup";
+		wakeup-source;
 
 		vddio-supply = <&pm8150_s4>;
 		vddxo-supply = <&pm8150_l12>;
-- 
2.43.0

Re: [RFC PATCH 3/3] arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup

[Konrad Dybcio]

On 10/14/26 2:19 PM, Linghui Wu wrote:
> Configure the WCN power sequencer SW_CTRL signal as a named wake IRQ and
> mark it as a wakeup source. The CQM SOM DTSI is shared by the CQM and CQS
> EVKs, while the IQS EVK uses the IQS SOM DTSI.

You already have a reference to that pin. You can do something like
gpiod_to_irq()

Konrad

Re: [RFC PATCH 0/3] power: sequencing: qcom-wcn: support SW_CTRL wake IRQ

[Konrad Dybcio]

On 10/14/26 2:19 PM, Linghui Wu wrote:
> Some WCN3990-family designs connect the SW_CTRL output to a GPIO on the
> application processor. On Shikra, the WCN3988 SW_CTRL signal is connected
> to GPIO88 and is used through the MGPI/AOSS hardware path to request the
> required RF clocks.
> 
> Qualcomm downstream kernels configure this path through
> msm_gpio_mpm_wake_set(), but upstream does not provide an equivalent API.

This information is not useful to the reader who doesn't follow the
Qualcomm downstream kernels.

> This series models SW_CTRL as a dedicated wake IRQ. Requesting the GPIO IRQ
> resource enables POWER_SAVE_WAKEUP_ENABLE in Qualcomm TLMM when
> WAKEUP_PRESENT is advertised, while the PM core keeps the IRQ disabled
> during normal operation and arms it for system suspend.

This starts off good, but zooms in too much on the specifics, instead
of the functional outcome.

> This is an RFC because the intended hardware and software model still
> needs confirmation. In particular, please advise whether SW_CTRL should
> be represented as an AP wake source using dev_pm_set_dedicated_wake_irq(),
> or whether Linux only needs an interface to explicitly configure the
> TLMM/MGPI power-save path.

You threw a lot of Qualcomm TLAs at potentially non-Qualcomm reviewers,
so it's not really possible for them to give you this advice.

> The series documents the named wakeup interrupt for the WCN PMU binding,
> implements dedicated wake IRQ handling in the Qualcomm WCN power
> sequencer, and enables it on the Shikra CQM, CQS and IQS EVKs. On this
> base, CQM and CQS share shikra-cqm-som.dtsi, while IQS uses
> shikra-iqs-som.dtsi.

The second sentence brings no value.

> Testing:
> - scripts/checkpatch.pl --strict: passed
> - dt-binding-check: passed
> - dtb-check: passed
> - sparse-check: passed
> - Shikra CQM, CQS and IQS DTB builds: passed

The above cases are implicitly expected and shouldn't be listed out.
> - QIPL validation of the equivalent qcom-6.18.y implementation: passed

This is a useless test on a year-old kernel with a million patches on top
that doesn't reflect whether the change works on the target tree (which
is approximately linux-next/master). You must test your changes on the
base that you intend the patch to be applied to.

> An earlier experiment confirmed that requesting GPIO88 as an IRQ changes
> TLMM_GPIO_INTR_CFG88 from 0x942 to 0x9c2, setting
> POWER_SAVE_WAKEUP_ENABLE.
> 
> Linghui Wu (3):
>   dt-bindings: power: sequencing: qcom-wcn: document wakeup-source
>   power: sequencing: qcom-wcn: support SW_CTRL wake IRQ
>   arm64: dts: qcom: shikra: enable WCN SW_CTRL wakeup
> 
>  .../bindings/regulator/qcom,wcn3990-pmu.yaml  | 22 ++++++++++++++
>  arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi  |  4 +++
>  arch/arm64/boot/dts/qcom/shikra-iqs-som.dtsi  |  4 +++
>  drivers/power/sequencing/pwrseq-qcom-wcn.c    | 30 +++++++++++++++++++
>  4 files changed, 60 insertions(+)
> 
> 
> base-commit: a90ee4305c4a5df72c11b31dacfdc76e00fcf78a

You must base your changes on linux-next, otherwise your base is
effectively 3 months behind the current developments.

Konrad