From: Paul Cercueil <paul.cercueil@bootlin.com>
To: Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Takahiro Kuwano <takahiro.kuwano@infineon.com>,
Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Mark Brown <broonie@kernel.org>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Kees Cook <kees@kernel.org>, Tony Luck <tony.luck@intel.com>,
"Guilherme G . Piccoli" <gpiccoli@igalia.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, Bharat Bhushan <bbhushan2@marvell.com>,
Sunil Kovvuri Goutham <sgoutham@marvell.com>,
Tanmay Jagdale <tanmay@marvell.com>,
Paul Cercueil <paul.cercueil@bootlin.com>
Subject: [PATCH v3 2/7] mtd: spi-nor: Wait for NOR ready with poll_timeout_us()
Date: Wed, 14 Oct 2026 17:42:56 +0200 [thread overview]
Message-ID: <20261014154301.157755-3-paul.cercueil@bootlin.com> (raw)
In-Reply-To: <20261014154301.157755-1-paul.cercueil@bootlin.com>
From: Tanmay Jagdale <tanmay@marvell.com>
Instead of polling for the spi_nor_ready() with a custom loop, use
poll_timeout_us(). The sleep period between two polls is set to 100 us
which I think should be fine.
This will make it simpler to support waiting for the SPI NOR in atomic
context later.
Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
Co-developed-by: Paul Cercueil <paul.cercueil@bootlin.com>
Signed-off-by: Paul Cercueil <paul.cercueil@bootlin.com>
---
Notes:
v2: New patch
v3: Set 'timeout_ms' parameter to u64 to prevent u32 overflow
drivers/mtd/spi-nor/core.c | 40 +++++++++++++++-----------------------
1 file changed, 16 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
index 8bc117b46e02..58257cc21c68 100644
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -12,6 +12,7 @@
#include <linux/device.h>
#include <linux/err.h>
#include <linux/errno.h>
+#include <linux/iopoll.h>
#include <linux/math64.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
@@ -32,13 +33,13 @@
* For everything but full-chip erase; probably could be much smaller, but kept
* around for safety for now
*/
-#define DEFAULT_READY_WAIT_JIFFIES (40UL * HZ)
+#define DEFAULT_READY_TIMEOUT_MS 40000UL
/*
* For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up
* for larger flash
*/
-#define CHIP_ERASE_2MB_READY_WAIT_JIFFIES (40UL * HZ)
+#define CHIP_ERASE_2MB_READY_TIMEOUT_MS 40000UL
#define SPI_NOR_MAX_ADDR_NBYTES 4
@@ -711,30 +712,21 @@ static int spi_nor_ready(struct spi_nor *nor)
*
* Return: 0 on success, -errno otherwise.
*/
-static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
- unsigned long timeout_jiffies)
+static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor, u64 timeout_ms)
{
- unsigned long deadline;
- int timeout = 0, ret;
+ int ret, status;
- deadline = jiffies + timeout_jiffies;
-
- while (!timeout) {
- if (time_after_eq(jiffies, deadline))
- timeout = 1;
-
- ret = spi_nor_ready(nor);
- if (ret < 0)
- return ret;
- if (ret)
- return 0;
-
- cond_resched();
+ ret = poll_timeout_us(status = spi_nor_ready(nor), status,
+ 100, timeout_ms * 1000, false);
+ if (ret < 0) {
+ dev_dbg(nor->dev, "flash operation timed out\n");
+ return ret;
}
- dev_dbg(nor->dev, "flash operation timed out\n");
+ if (status < 0)
+ return status;
- return -ETIMEDOUT;
+ return 0;
}
/**
@@ -747,7 +739,7 @@ static int spi_nor_wait_till_ready_with_timeout(struct spi_nor *nor,
int spi_nor_wait_till_ready(struct spi_nor *nor)
{
return spi_nor_wait_till_ready_with_timeout(nor,
- DEFAULT_READY_WAIT_JIFFIES);
+ DEFAULT_READY_TIMEOUT_MS);
}
/**
@@ -1781,8 +1773,8 @@ static int spi_nor_erase_dice(struct spi_nor *nor, loff_t addr,
* pull these from CFI/SFDP, but these values should be good
* enough for now.
*/
- timeout = max(CHIP_ERASE_2MB_READY_WAIT_JIFFIES,
- CHIP_ERASE_2MB_READY_WAIT_JIFFIES *
+ timeout = max(CHIP_ERASE_2MB_READY_TIMEOUT_MS,
+ CHIP_ERASE_2MB_READY_TIMEOUT_MS *
(unsigned long)(nor->mtd.size / SZ_2M));
do {
--
2.47.3
next prev parent reply other threads:[~2026-10-14 15:44 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-14 15:42 [PATCH v3 0/7] spi: Add support for panic mem writes Paul Cercueil
2026-10-14 15:42 ` [PATCH v3 1/7] spi: spi-mem: " Paul Cercueil
2026-10-14 15:42 ` Paul Cercueil [this message]
2026-10-14 15:42 ` [PATCH v3 3/7] mtd: spi-nor: Add support for panic writes Paul Cercueil
2026-10-14 15:42 ` [PATCH v3 4/7] spi: cadence-xspi: Clear "SDMA ready" IRQ flag after polling Paul Cercueil
2026-10-14 15:42 ` [PATCH v3 5/7] spi: cadence-xspi: Add irq-less support Paul Cercueil
2026-10-14 15:43 ` [PATCH v3 6/7] spi: cadence-xspi: Add support for panic writes Paul Cercueil
2026-10-14 15:43 ` [PATCH v3 7/7] spi: dt-bindings: cadence: Make XSPI's IRQ line optional Paul Cercueil
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20261014154301.157755-3-paul.cercueil@bootlin.com \
--to=paul.cercueil@bootlin.com \
--cc=bbhushan2@marvell.com \
--cc=broonie@kernel.org \
--cc=gpiccoli@igalia.com \
--cc=kees@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=linux-spi@vger.kernel.org \
--cc=miquel.raynal@bootlin.com \
--cc=mwalle@kernel.org \
--cc=pratyush@kernel.org \
--cc=richard@nod.at \
--cc=sgoutham@marvell.com \
--cc=takahiro.kuwano@infineon.com \
--cc=tanmay@marvell.com \
--cc=thomas.petazzoni@bootlin.com \
--cc=tony.luck@intel.com \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®