From: fangyu.yu@linux.alibaba.com
To: tanchi25@mails.ucas.ac.cn
Cc: alex@ghiti.fr, andrew.jones@oss.qualcomm.com,
anup@brainfault.org, aou@eecs.berkeley.edu,
atish.patra@linux.dev, baolu.lu@linux.intel.com,
fangyu.yu@linux.alibaba.com, gsh517025@gmail.com,
guoren@kernel.org, iommu@lists.linux.dev, jgg@nvidia.com,
jgg@ziepe.ca, joerg.roedel@amd.com, joro@8bytes.org,
jroedel@suse.de, kevin.tian@intel.com,
kvm-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, palmer@dabbelt.com,
pjw@kernel.org, robin.murphy@arm.com, skhawaja@google.com,
tomasz.jeznach@linux.dev, vasant.hegde@amd.com, will@kernel.org,
zong.li@sifive.com
Subject: Re: [RFC PATCH v4 10/10] iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries
Date: Tue, 20 Oct 2026 09:24:03 +0800 [thread overview]
Message-ID: <20261020012403.22247-1-fangyu.yu@linux.alibaba.com> (raw)
In-Reply-To: <20261019133536.1610-1-tanchi25@mails.ucas.ac.cn>
>Hi Fangyu,
>
>I wonder if riscv_iommu_iodir_set_mode() also needs a global
>IOTINVAL.GVMA now that second-stage translations are supported.
>
>It currently issues IODIR.INVAL_DDT and IOTINVAL.VMA after updating
>DDTP, but cached G-stage translations may still remain, for example
>when the IOMMU is reinitialized after a previous kernel used
>second-stage domains.
>
>Would a global IOTINVAL.GVMA (GV=0) be needed here as well?
>
Good catch.
Per the spec, adding an IOTINVAL.GVMA here is more accurate when
second-stage translation is enabled.
I'll add an IOTINVAL.GVMA in set_mode() in the next version.
Thanks,
Fangyu
>Thanks,
>Tan Chi
>
prev parent reply other threads:[~2026-10-20 1:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 3:28 [RFC PATCH v4 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains fangyu.yu
2026-09-15 3:28 ` [RFC PATCH v4 01/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-09-15 3:28 ` [RFC PATCH v4 02/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-09-15 3:28 ` [RFC PATCH v4 03/10] iommu/riscv: report iommu capabilities fangyu.yu
2026-09-18 3:39 ` Nutty.Liu
2026-09-15 3:28 ` [RFC PATCH v4 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-09-18 3:42 ` Nutty.Liu
2026-09-18 16:08 ` Gong Shuai
2026-09-20 3:08 ` fangyu.yu
2026-09-20 5:27 ` Gong Shuai
2026-09-15 3:28 ` [RFC PATCH v4 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-09-18 4:03 ` Nutty.Liu
2026-09-15 3:28 ` [RFC PATCH v4 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-09-18 4:03 ` Nutty.Liu
2026-09-15 3:28 ` [RFC PATCH v4 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-09-15 3:28 ` [RFC PATCH v4 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-09-18 16:18 ` Gong Shuai
2026-09-20 3:12 ` fangyu.yu
2026-09-20 5:05 ` Gong Shuai
2026-09-20 7:42 ` fangyu.yu
2026-09-15 3:28 ` [RFC PATCH v4 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu
2026-09-17 1:40 ` [RFC PATCH v4 00/10] iommu/riscv: Add hardware dirty tracking " Gong Shuai
2026-09-17 2:02 ` fangyu.yu
2026-09-17 2:54 ` [RFC PATCH v4 10/10] iommu/riscv: Add IOTINVAL.GVMA after updating DDT/PDT entries fangyu.yu
2026-10-19 13:35 ` Tan Chi
2026-10-20 1:24 ` fangyu.yu [this message]
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