[PATCH 7/8] drm/msm/a6xx: Request CLX enable from secure world

[Akhil P Oommen <akhilpo@oss.qualcomm.com>]

The CLX (Current Limit Extension) feature also requires the secure
world to enable it via the GPU init regs SCM call. Without the
QCOM_SCM_GPU_CLX_EN_REQ flag, the CLX tables sent to the GMU over HFI
are not effective.

Set QCOM_SCM_GPU_CLX_EN_REQ in the SCM request on GPUs that have a CLX
table in their catalog entry.

Fixes: 967e62fbeecc ("drm/msm/a6xx: Add HFI support for CLX feature")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
 drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 991db3c9cd96..a1561ca41a5b 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -1247,8 +1247,12 @@ static int a6xx_gmu_secure_init(struct a6xx_gpu *a6xx_gpu)
 			goto done;
 		}
 
-		ret = qcom_scm_gpu_init_regs(QCOM_SCM_GPU_ALWAYS_EN_REQ |
-					     QCOM_SCM_GPU_TSENSE_EN_REQ);
+		u32 gpu_req = QCOM_SCM_GPU_ALWAYS_EN_REQ | QCOM_SCM_GPU_TSENSE_EN_REQ;
+
+		if (adreno_gpu->info->a6xx->clx_tbl)
+			gpu_req |= QCOM_SCM_GPU_CLX_EN_REQ;
+
+		ret = qcom_scm_gpu_init_regs(gpu_req);
 		if (ret) {
 			dev_warn_once(gpu->dev->dev,
 				"SCM call failed\n");

-- 
2.55.0