Re: [RFC PATCH v5 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains

[fangyu.yu@linux.alibaba.com]

>> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>>
>> The RISC-V IOMMU architecture defines an AMO_HWAD capability (Hardware
>> Access/Dirty update) that allows the IOMMU to atomically set the A/D bits
>> in second-stage PTEs on DMA access.  When DC.tc.GADE is asserted, the IOMMU
>> autonomously sets D on the first write to a page mapped by an iohgatp
>> domain.  This series wires that capability up to the iommufd dirty-tracking
>> interface (IOMMU_HWPT_SET_DIRTY_TRACKING / IOMMU_HWPT_GET_DIRTY_BITMAP) and
>> reports IOMMU_CAP_DIRTY_TRACKING.
>
>These patches don't apply, so sashiko couldn't run:
>
>https://sashiko.dev/#/patchset/20261020094106.92722-1-fangyu.yu%40linux.alibaba.com
>
>> [ ... 86 lines skipped ... ]
>> [1] https://lore.kernel.org/linux-iommu/1-v2-563ee63886f0+1209-iommupt_armv8_jgg@nvidia.com/
>> [2] https://lore.kernel.org/linux-iommu/20260818092444.42755-1-andrew.jones@oss.qualcomm.com/
>
>Because of these extra patches I suppose.
>
>Please figure out how to fix this before you send it again..
>
>Also no base-commit trailer which helps sashiko apply them.
>

Sure, I'll fix the apply issues and add a base-commit trailer in the
next version.

Thanks,
Fangyu

>--
>Jason