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From: "Nutty.Liu" <nutty.liu@hotmail.com>
To: fangyu.yu@linux.alibaba.com, tomasz.jeznach@linux.dev,
	joro@8bytes.org, will@kernel.org, robin.murphy@arm.com,
	pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu,
	alex@ghiti.fr, baolu.lu@linux.intel.com, jroedel@suse.de,
	zong.li@sifive.com, andrew.jones@linux.dev, anup@brainfault.org,
	jgg@nvidia.com, jgg@ziepe.ca, kevin.tian@intel.com,
	atish.patra@linux.dev, skhawaja@google.com, vasant.hegde@amd.com,
	joerg.roedel@amd.com, tanchi25@mails.ucas.ac.cn,
	gong.shuai@sanechips.com.cn
Cc: guoren@kernel.org, iommu@lists.linux.dev,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	kvm-riscv@lists.infradead.org
Subject: Re: [RFC PATCH v5 08/10] iommu/riscv: Pre-enable GADE for second-stage domains
Date: Tue, 27 Oct 2026 19:43:30 +0800	[thread overview]
Message-ID: <TYZPR04MB7491539CAE8D3B333C52F12CF3602@TYZPR04MB7491.apcprd04.prod.outlook.com> (raw)
In-Reply-To: <20261020094106.92722-9-fangyu.yu@linux.alibaba.com>


On 10/20/2026 5:41 PM, fangyu.yu@linux.alibaba.com wrote:
> From: Fangyu Yu <fangyu.yu@linux.alibaba.com>
>
> Pre-enable RISCV_IOMMU_DC_TC_GADE in the device context when
> attaching a second-stage domain, if the IOMMU supports AMO_HWAD.
>
> Software pre-populates second-stage page tables with D set, so
> enabling GADE by default does not change normal behavior. When
> dirty tracking is enabled, iommufd clears the pre-set D bits and
> GADE becomes necessary for hardware to update the dirty bit on
> write access.
>
> This avoids toggling GADE dynamically and keeps device context
> setup consistent with second-stage domain attachment.
>
> Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Reviewed-by: Nutty Liu <nutty.liu@hotmail.com>

Thanks,
Nutty
> ---
>   drivers/iommu/riscv/iommu.c | 4 ++++
>   1 file changed, 4 insertions(+)
>
> diff --git a/drivers/iommu/riscv/iommu.c b/drivers/iommu/riscv/iommu.c
> index debce1b4201c..9310b818c038 100644
> --- a/drivers/iommu/riscv/iommu.c
> +++ b/drivers/iommu/riscv/iommu.c
> @@ -1236,6 +1236,8 @@ static void riscv_iommu_iodir_update(struct riscv_iommu_device *iommu,
>   	for (i = 0; i < fwspec->num_ids; i++) {
>   		dc = riscv_iommu_get_dc(iommu, fwspec->ids[i]);
>   		tc = READ_ONCE(dc->tc);
> +		tc &= ~RISCV_IOMMU_DC_TC_GADE;
> +		tc |= new_dc->tc & RISCV_IOMMU_DC_TC_GADE;
>   		tc |= new_dc->ta & RISCV_IOMMU_DC_TC_V;
>   
>   		WRITE_ONCE(dc->fsc, new_dc->fsc);
> @@ -1352,6 +1354,8 @@ static int riscv_iommu_attach_paging_domain(struct iommu_domain *iommu_domain,
>   			FIELD_PREP(RISCV_IOMMU_DC_IOHGATP_MODE, pt_info.iohgatp_mode) |
>   			FIELD_PREP(RISCV_IOMMU_DC_IOHGATP_GSCID, domain->gscid) |
>   			FIELD_PREP(RISCV_IOMMU_DC_IOHGATP_PPN, pt_info.ppn);
> +		if (iommu->caps & RISCV_IOMMU_CAPABILITIES_AMO_HWAD)
> +			dc.tc |= RISCV_IOMMU_DC_TC_GADE;
>   	} else {
>   		if (!riscv_iommu_fsc_supported(iommu, pt_info.fsc_iosatp_mode))
>   			return -ENODEV;

  reply	other threads:[~2026-10-27 11:43 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-20  9:40 [RFC PATCH v5 00/10] iommu/riscv: Add hardware dirty tracking " fangyu.yu
2026-10-20  9:40 ` [RFC PATCH v5 01/10] iommupt: Add RISC-V Second-stage (iohgatp) page table support fangyu.yu
2026-10-28 15:28   ` Jason Gunthorpe
2026-10-20  9:40 ` [RFC PATCH v5 02/10] iommupt: Add RISC-V dirty tracking PTE ops fangyu.yu
2026-10-28 15:28   ` Jason Gunthorpe
2026-10-20  9:40 ` [RFC PATCH v5 03/10] iommu/riscv: report iommu capabilities fangyu.yu
2026-10-28 15:28   ` Jason Gunthorpe
2026-10-30  2:31   ` Gong Shuai
2026-10-30  2:49     ` fangyu.yu
2026-10-20  9:41 ` [RFC PATCH v5 04/10] iommu/riscv: use data structure instead of individual values fangyu.yu
2026-10-28 15:28   ` Jason Gunthorpe
2026-10-20  9:41 ` [RFC PATCH v5 05/10] iommu/riscv: support GSCID and GVMA invalidation command fangyu.yu
2026-10-20  9:41 ` [RFC PATCH v5 06/10] RISC-V: KVM: Enable KVM_VFIO interfaces on RISC-V arch fangyu.yu
2026-10-20  9:41 ` [RFC PATCH v5 07/10] iommu/riscv: Add domain_alloc_paging_flags for second-stage domain fangyu.yu
2026-10-28 15:28   ` Jason Gunthorpe
2026-10-29  1:41     ` fangyu.yu
2026-10-20  9:41 ` [RFC PATCH v5 08/10] iommu/riscv: Pre-enable GADE for second-stage domains fangyu.yu
2026-10-27 11:43   ` Nutty.Liu [this message]
2026-10-20  9:41 ` [RFC PATCH v5 09/10] iommu/riscv: Add dirty tracking support " fangyu.yu
2026-10-27 11:52   ` Nutty.Liu
2026-10-20  9:41 ` [RFC PATCH v5 10/10] iommu/riscv: Add IOTINVAL.GVMA invalidations fangyu.yu
2026-10-27 11:46   ` Nutty.Liu
2026-10-28 15:28 ` [RFC PATCH v5 00/10] iommu/riscv: Add hardware dirty tracking for second-stage domains Jason Gunthorpe
2026-10-29  1:52   ` fangyu.yu

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