[PATCH v2 0/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search

[PATCH v2 0/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search

[Manikanta Maddireddy]

pci_epc_get_next_free_bar() can return the upper half of a reserved or
disabled 64-bit BAR when the search passes that BAR. On Tegra, this can
cause the EPF test driver to attempt to program BAR3 and BAR5 even though
they are the upper halves of reserved BAR2 and BAR4.

Patch 1 checks the preceding descriptor for every candidate so that upper
halves are skipped throughout the search. Patch 2 clarifies that only_64bit
also describes the hardware width of a BAR_RESERVED and that the following
BAR register cannot be used independently. The existing wording for BAR
configuration by EPF drivers is retained.

Changes in v2:
- Rebase onto the current PCI main-based patch stack.
- Add a Fixes tag referencing 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit
  on BAR_RESERVED") to patch 1. The code change is unchanged from v1.
- Add patch 2 to clarify only_64bit for BAR_RESERVED, following Niklas
  Cassel's review.
- Add a cover letter now that the series contains two patches.

v1: https://lore.kernel.org/linux-pci/20261021080644.1346549-1-mmaddireddy@nvidia.com/

Manikanta Maddireddy (2):
  PCI: endpoint: Skip upper halves of 64-bit BARs during search
  PCI: endpoint: Clarify only_64bit for reserved BARs

 drivers/pci/endpoint/pci-epc-core.c | 8 ++++----
 include/linux/pci-epc.h             | 5 +++++
 2 files changed, 9 insertions(+), 4 deletions(-)


base-commit: e04b12478ada488e59c54bf17dee4e0f5843e131
-- 
2.34.1

[PATCH v2 1/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search

[Manikanta Maddireddy]

pci_epc_get_next_free_bar() skips the upper half of a 64-bit BAR only
when it is the starting BAR. If the search subsequently passes a
reserved or disabled 64-bit BAR, it can return its upper half as an
independent BAR because that slot has a default programmable descriptor.

For example, Tegra exposes a programmable 64-bit BAR0 and reserved
64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2,
then incorrectly returns BAR3. The next search can similarly return
BAR5, causing the EPF test driver to allocate and program BARs that
belong to the reserved hardware windows.

Check each candidate's preceding descriptor inside the search loop so
upper halves are skipped throughout the search. With the Tegra layout,
BAR0 is the only available BAR and subsequent searches return NO_BAR.

Fixes: 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED")
Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
Changes V1 -> V2:
- Add Fixes: 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED")
  following Niklas Cassel's review.
- Rebase onto the current PCI main-based patch stack.
- No code changes from v1.

 drivers/pci/endpoint/pci-epc-core.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
index 831b40458dcd..8d0df9fc1df9 100644
--- a/drivers/pci/endpoint/pci-epc-core.c
+++ b/drivers/pci/endpoint/pci-epc-core.c
@@ -98,11 +98,11 @@ enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
 	if (!epc_features)
 		return BAR_0;
 
-	/* If 'bar - 1' is a 64-bit BAR, move to the next BAR */
-	if (bar > 0 && epc_features->bar[bar - 1].only_64bit)
-		bar++;
-
 	for (i = bar; i < PCI_STD_NUM_BARS; i++) {
+		/* Skip the upper half of a 64-bit BAR. */
+		if (i > 0 && epc_features->bar[i - 1].only_64bit)
+			continue;
+
 		/* If the BAR is not reserved or disabled, return it. */
 		if (epc_features->bar[i].type != BAR_RESERVED &&
 		    epc_features->bar[i].type != BAR_DISABLED)
-- 
2.34.1

Re: [PATCH v2 1/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search

[Niklas Cassel]

On Mon, Nov 02, 2026 at 04:53:05PM +0530, Manikanta Maddireddy wrote:
> pci_epc_get_next_free_bar() skips the upper half of a 64-bit BAR only
> when it is the starting BAR. If the search subsequently passes a
> reserved or disabled 64-bit BAR, it can return its upper half as an
> independent BAR because that slot has a default programmable descriptor.
> 
> For example, Tegra exposes a programmable 64-bit BAR0 and reserved
> 64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2,
> then incorrectly returns BAR3. The next search can similarly return
> BAR5, causing the EPF test driver to allocate and program BARs that
> belong to the reserved hardware windows.
> 
> Check each candidate's preceding descriptor inside the search loop so
> upper halves are skipped throughout the search. With the Tegra layout,
> BAR0 is the only available BAR and subsequent searches return NO_BAR.
> 
> Fixes: 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED")
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>

Reviewed-by: Niklas Cassel <cassel@kernel.org>

Re: [PATCH v2 1/2] PCI: endpoint: Skip upper halves of 64-bit BARs during search

[Frank Li]

On Mon, Nov 02, 2026 at 04:53:05PM +0530, Manikanta Maddireddy wrote:
> pci_epc_get_next_free_bar() skips the upper half of a 64-bit BAR only
> when it is the starting BAR. If the search subsequently passes a
> reserved or disabled 64-bit BAR, it can return its upper half as an
> independent BAR because that slot has a default programmable descriptor.
>
> For example, Tegra exposes a programmable 64-bit BAR0 and reserved
> 64-bit BAR2 and BAR4. A search starting at BAR1 skips BAR1 and BAR2,
> then incorrectly returns BAR3. The next search can similarly return
> BAR5, causing the EPF test driver to allocate and program BARs that
> belong to the reserved hardware windows.
>
> Check each candidate's preceding descriptor inside the search loop so
> upper halves are skipped throughout the search. With the Tegra layout,
> BAR0 is the only available BAR and subsequent searches return NO_BAR.
>
> Fixes: 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED")
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> ---

Reviewed-by: Frank Li <Frank.Li@nxp.com>

> Changes V1 -> V2:
> - Add Fixes: 27ce1d8ecb9b ("PCI: endpoint: Allow only_64bit on BAR_RESERVED")
>   following Niklas Cassel's review.
> - Rebase onto the current PCI main-based patch stack.
> - No code changes from v1.
>
>  drivers/pci/endpoint/pci-epc-core.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c
> index 831b40458dcd..8d0df9fc1df9 100644
> --- a/drivers/pci/endpoint/pci-epc-core.c
> +++ b/drivers/pci/endpoint/pci-epc-core.c
> @@ -98,11 +98,11 @@ enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features
>  	if (!epc_features)
>  		return BAR_0;
>
> -	/* If 'bar - 1' is a 64-bit BAR, move to the next BAR */
> -	if (bar > 0 && epc_features->bar[bar - 1].only_64bit)
> -		bar++;
> -
>  	for (i = bar; i < PCI_STD_NUM_BARS; i++) {
> +		/* Skip the upper half of a 64-bit BAR. */
> +		if (i > 0 && epc_features->bar[i - 1].only_64bit)
> +			continue;
> +
>  		/* If the BAR is not reserved or disabled, return it. */
>  		if (epc_features->bar[i].type != BAR_RESERVED &&
>  		    epc_features->bar[i].type != BAR_DISABLED)
> --
> 2.34.1
>

[PATCH v2 2/2] PCI: endpoint: Clarify only_64bit for reserved BARs

[Manikanta Maddireddy]

The only_64bit documentation describes how an EPF driver must configure a
BAR, but BAR_RESERVED must not be reprogrammed by an EPF driver.

Keep the existing configuration requirement and explain that only_64bit
also describes the hardware width of a reserved BAR. State explicitly
that its following BAR register holds the upper 32 bits and cannot be
used independently.

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
---
Changes V1 -> V2:
- New in v2, following Niklas Cassel's review.
- Clarify that only_64bit describes the hardware width of BAR_RESERVED
  and that its upper half cannot be used independently, while retaining
  the existing EPF configuration wording.

 include/linux/pci-epc.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index f247cf9bcf1a..2223842c372b 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -292,6 +292,11 @@ struct pci_epc_bar_rsvd_region {
  * @only_64bit: if true, an EPF driver is not allowed to choose if this BAR
  *		should be configured as 32-bit or 64-bit, the EPF driver must
  *		configure this BAR as 64-bit.
+ *
+ *		For BAR_RESERVED, only_64bit describes the hardware BAR width
+ *		and does not permit an EPF driver to reprogram the BAR. Set it
+ *		if the reserved BAR is 64-bit. The following BAR register holds
+ *		the upper 32 bits and is not independently usable.
  * @nr_rsvd_regions: number of fixed subregions described for BAR_RESERVED
  * @rsvd_regions: fixed subregions behind BAR_RESERVED
  */
-- 
2.34.1

Re: [PATCH v2 2/2] PCI: endpoint: Clarify only_64bit for reserved BARs

[Niklas Cassel]

On Mon, Nov 02, 2026 at 04:53:06PM +0530, Manikanta Maddireddy wrote:
> The only_64bit documentation describes how an EPF driver must configure a
> BAR, but BAR_RESERVED must not be reprogrammed by an EPF driver.
> 
> Keep the existing configuration requirement and explain that only_64bit
> also describes the hardware width of a reserved BAR. State explicitly
> that its following BAR register holds the upper 32 bits and cannot be
> used independently.
> 
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>

Reviewed-by: Niklas Cassel <cassel@kernel.org>