From: Joonhoe Kim <26rote@gmail.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Antonino Maniscalco <antomani103@gmail.com>,
Kalyan Thota <quic_kalyant@quicinc.com>,
Federico Amedeo Izzo <federico@izzo.pro>,
Helen Koike <helen.fornazier@gmail.com>,
Vignesh Raman <vignesh.raman@collabora.com>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v5 09/10] drm/msm/dpu: only reassign resources when the encoder is reprogrammed
Date: Tue, 3 Nov 2026 07:05:01 +0900 [thread overview]
Message-ID: <20261102220501.1704-1-26rote@gmail.com> (raw)
In-Reply-To: <86bf919b-5528-42bb-aa89-b518452ed7a0@oss.qualcomm.com>
On 10/26/26 10:19 AM, Konrad Dybcio wrote:
> LLM is curious whether turning off CTM/GAMMA should trigger a modeset too.
> My hunch is "yes"
Some data for that. I tested 7/10 and this patch on v7.3, on a Lenovo
Y700 Gen 5 (TB323FU, Kaanapali, bonded DSI) with out-of-tree board
support. I counted msm_dsi_host_power_off/on with kprobes.
- A compositor faded a night light filter in and out twice through
the legacy CTM property. These are blob -> blob updates only. No
modesets, no visible blink.
- With no compositor running, a small client set the CTM through the
legacy property ioctl: two rounds of NULL -> A -> B -> A -> NULL.
No modesets. The CRTC kept its DSPPs after each A -> NULL.
So turning the CTM off does not release the DSPPs. On chips with a
single DSPP, another CRTC asking for a CTM would then fail
dpu_rm_reserve(), as I noted on v4. This run does not cover the first
NULL -> blob on a CRTC without DSPPs.
As with v4, the tree carries out-of-tree SPR (sub-pixel rendering)
support. For the test, dpu_crtc_needs_dspp() also returned true when
SPR is enabled.
Tested-by: Joonhoe Kim <26rote@gmail.com> # Kaanapali
Thanks,
Joonhoe Kim
next prev parent reply other threads:[~2026-11-02 22:05 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-23 23:25 [PATCH v5 00/10] drm/msm: fix SMMU fault dumps Dmitry Baryshkov
2026-10-23 23:25 ` [PATCH v5 01/10] drm/msm: serialise framebuffer pin state Dmitry Baryshkov
2026-10-26 8:55 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 02/10] drm/msm: fix framebuffer pin refcount leak on prepare failure Dmitry Baryshkov
2026-10-26 8:59 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 03/10] drm/msm: release scanout framebuffers only after a vblank Dmitry Baryshkov
2026-10-23 23:25 ` [PATCH v5 04/10] drm/msm/mdp5: flush the interface before starting the timing engine Dmitry Baryshkov
2026-10-26 9:11 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 05/10] drm/msm/dpu: clear the CWB blocks left by a previous reservation Dmitry Baryshkov
2026-10-26 9:13 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 06/10] drm/msm/dpu: clear the CDM block " Dmitry Baryshkov
2026-10-26 9:15 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 07/10] drm/msm/dpu: clear the DSPP pointer when no DSPP is assigned Dmitry Baryshkov
2026-10-26 9:15 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 08/10] drm/msm/dpu: clear the DSC blocks left by a previous reservation Dmitry Baryshkov
2026-10-26 9:16 ` Konrad Dybcio
2026-10-23 23:25 ` [PATCH v5 09/10] drm/msm/dpu: only reassign resources when the encoder is reprogrammed Dmitry Baryshkov
2026-10-26 9:19 ` Konrad Dybcio
2026-11-02 22:05 ` Joonhoe Kim [this message]
2026-10-23 23:25 ` [PATCH v5 10/10] drm/ci: mark pixel-format tests as passing on SC7180 Dmitry Baryshkov
2026-10-26 9:19 ` Konrad Dybcio
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