From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <treding@nvidia.com>,
<jonathanh@nvidia.com>, <linux-pm@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: <bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [PATCH 4/9] cpufreq: tegra194: add per-SoC counter mask
Date: Wed, 4 Nov 2026 23:45:16 +0530 [thread overview]
Message-ID: <20261104181521.3003578-5-sumitg@nvidia.com> (raw)
In-Reply-To: <20261104181521.3003578-1-sumitg@nvidia.com>
Frequency readback handles counter wrap-around with MAX_CNT, which is
hardcoded to 32 bits. Move the counter's maximum value into the SoC
data, in preparation for adding support for Tegra264, whose AMU counters
are 64-bit.
Add cnt_mask to tegra_cpufreq_soc and set it to U32_MAX on
Tegra194/234/238, which matches MAX_CNT. Also widen tegra_cpu_ctr to
u64, so it can hold counters of either width.
No functional change.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
drivers/cpufreq/tegra194-cpufreq.c | 20 +++++++++++++-------
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/cpufreq/tegra194-cpufreq.c b/drivers/cpufreq/tegra194-cpufreq.c
index afc10c0b874e..a3aaebde41cc 100644
--- a/drivers/cpufreq/tegra194-cpufreq.c
+++ b/drivers/cpufreq/tegra194-cpufreq.c
@@ -22,7 +22,6 @@
#define KHZ 1000
#define REF_CLK_MHZ 408 /* 408 MHz */
#define CPUFREQ_TBL_STEP_HZ (50 * KHZ * KHZ)
-#define MAX_CNT ~0U
#define MAX_DELTA_KHZ 115200
@@ -48,8 +47,8 @@ struct tegra_cpu_data {
struct tegra_cpu_ctr {
u32 cpu;
- u32 coreclk_cnt, last_coreclk_cnt;
- u32 refclk_cnt, last_refclk_cnt;
+ u64 coreclk_cnt, last_coreclk_cnt;
+ u64 refclk_cnt, last_refclk_cnt;
};
struct read_counters_work {
@@ -69,6 +68,7 @@ struct tegra_cpufreq_ops {
struct tegra_cpufreq_soc {
struct tegra_cpufreq_ops *ops;
+ u64 cnt_mask;
int maxcpus_per_cluster;
unsigned int num_clusters;
phys_addr_t actmon_cntr_base;
@@ -220,6 +220,7 @@ static struct tegra_cpufreq_ops tegra234_cpufreq_ops = {
static const struct tegra_cpufreq_soc tegra234_cpufreq_soc = {
.ops = &tegra234_cpufreq_ops,
+ .cnt_mask = U32_MAX,
.actmon_cntr_base = 0x9000,
.maxcpus_per_cluster = 4,
.num_clusters = 3,
@@ -228,6 +229,7 @@ static const struct tegra_cpufreq_soc tegra234_cpufreq_soc = {
static const struct tegra_cpufreq_soc tegra238_cpufreq_soc = {
.ops = &tegra234_cpufreq_ops,
+ .cnt_mask = U32_MAX,
.actmon_cntr_base = 0x4000,
.maxcpus_per_cluster = 8,
.num_clusters = 1,
@@ -314,7 +316,7 @@ static void tegra_read_counters(struct work_struct *work)
do {
data->soc->ops->sample_counters(data, c);
delta_refcnt = tegra_counter_delta(c->refclk_cnt, c->last_refclk_cnt,
- MAX_CNT);
+ data->soc->cnt_mask);
if (++cnt >= 0xFFFF) {
pr_warn("cpufreq: problem with refclk on cpu:%d, delta_refcnt:%llu, cnt:%d\n",
c->cpu, delta_refcnt, cnt);
@@ -346,8 +348,10 @@ static void tegra_read_counters(struct work_struct *work)
*/
static unsigned int tegra194_calculate_speed(u32 cpu)
{
+ struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
struct read_counters_work read_counters_work;
struct tegra_cpu_ctr c;
+ u64 cnt_mask = data->soc->cnt_mask;
u64 delta_refcnt;
u64 delta_ccnt;
u64 rate_mhz;
@@ -362,11 +366,11 @@ static unsigned int tegra194_calculate_speed(u32 cpu)
flush_work(&read_counters_work.work);
c = read_counters_work.c;
- delta_ccnt = tegra_counter_delta(c.coreclk_cnt, c.last_coreclk_cnt, MAX_CNT);
+ delta_ccnt = tegra_counter_delta(c.coreclk_cnt, c.last_coreclk_cnt, cnt_mask);
if (!delta_ccnt)
return 0;
- delta_refcnt = tegra_counter_delta(c.refclk_cnt, c.last_refclk_cnt, MAX_CNT);
+ delta_refcnt = tegra_counter_delta(c.refclk_cnt, c.last_refclk_cnt, cnt_mask);
if (!delta_refcnt) {
pr_debug("cpufreq: %d is idle, delta_refcnt: 0\n", cpu);
return 0;
@@ -620,6 +624,7 @@ static struct tegra_cpufreq_ops tegra194_cpufreq_ops = {
static const struct tegra_cpufreq_soc tegra194_cpufreq_soc = {
.ops = &tegra194_cpufreq_ops,
+ .cnt_mask = U32_MAX,
.maxcpus_per_cluster = 2,
.num_clusters = 4,
.refclk_delta_min = 16000,
@@ -716,7 +721,8 @@ static int tegra194_cpufreq_probe(struct platform_device *pdev)
soc = of_device_get_match_data(&pdev->dev);
- if (soc->ops && soc->maxcpus_per_cluster && soc->num_clusters && soc->refclk_delta_min) {
+ if (soc->ops && soc->maxcpus_per_cluster && soc->num_clusters &&
+ soc->refclk_delta_min && soc->cnt_mask) {
data->soc = soc;
} else {
dev_err(&pdev->dev, "soc data missing\n");
--
2.34.1
next prev parent reply other threads:[~2026-11-04 18:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 18:15 [PATCH 0/9] cpufreq: tegra194: add Tegra264 support Sumit Gupta
2026-11-04 18:15 ` [PATCH 1/9] cpufreq: tegra194: move MPIDR read to CPU hotplug callback Sumit Gupta
2026-11-04 18:15 ` [PATCH 2/9] cpufreq: tegra194: remove duplicate counter sampling loops Sumit Gupta
2026-11-04 18:15 ` [PATCH 3/9] cpufreq: tegra194: add tegra_counter_delta helper Sumit Gupta
2026-11-04 18:15 ` Sumit Gupta [this message]
2026-11-04 18:15 ` [PATCH 5/9] cpufreq: tegra194: split MMIO mapping from ACTMON offset Sumit Gupta
2026-11-04 18:15 ` [PATCH 6/9] dt-bindings: arm: nvidia: Document the Tegra264 CCPLEX cluster Sumit Gupta
2026-11-04 18:15 ` [PATCH 7/9] cpufreq: tegra194: derive frequency domain from device tree Sumit Gupta
2026-11-04 18:15 ` [PATCH 8/9] cpufreq: tegra194: Add support for Tegra264 Sumit Gupta
2026-11-04 18:15 ` [PATCH 9/9] arm64: tegra: Add CCPLEX cluster node " Sumit Gupta
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