From: Sumit Gupta <sumitg@nvidia.com>
To: <rafael@kernel.org>, <viresh.kumar@linaro.org>, <robh@kernel.org>,
<krzk+dt@kernel.org>, <conor+dt@kernel.org>, <treding@nvidia.com>,
<jonathanh@nvidia.com>, <linux-pm@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>
Cc: <bbasu@nvidia.com>, <sumitg@nvidia.com>
Subject: [PATCH 6/9] dt-bindings: arm: nvidia: Document the Tegra264 CCPLEX cluster
Date: Wed, 4 Nov 2026 23:45:18 +0530 [thread overview]
Message-ID: <20261104181521.3003578-7-sumitg@nvidia.com> (raw)
In-Reply-To: <20261104181521.3003578-1-sumitg@nvidia.com>
Add a compatible string for the CCPLEX cluster on Tegra264.
On Tegra264, two CPU clusters share one clock. Add the generic
"#performance-domain-cells" provider property so a CPU node can name
its domain with "performance-domains = <&ccplex N>", where N is the
index of the domain that clocks the CPU. The consumer side is already
described in bindings/arm/cpus.yaml.
The property is required on Tegra264, where a domain spans two clusters.
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
.../tegra/nvidia,tegra-ccplex-cluster.yaml | 27 ++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
index fe9c8791f227..2bdb512fb677 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra-ccplex-cluster.yaml
@@ -25,6 +25,7 @@ properties:
- nvidia,tegra186-ccplex-cluster
- nvidia,tegra234-ccplex-cluster
- nvidia,tegra238-ccplex-cluster
+ - nvidia,tegra264-ccplex-cluster
reg:
maxItems: 1
@@ -35,13 +36,29 @@ properties:
Specifies the BPMP node that needs to be queried to get
operating point data for all CPUs.
-additionalProperties: false
+ '#performance-domain-cells':
+ const: 1
+ description:
+ The cell is the index of the performance domain that clocks a CPU.
+ When present, every CPU names its domain with "performance-domains".
required:
- compatible
- reg
- nvidia,bpmp
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: nvidia,tegra264-ccplex-cluster
+ then:
+ required:
+ - '#performance-domain-cells'
+
+additionalProperties: false
+
examples:
- |
ccplex@e000000 {
@@ -49,3 +66,11 @@ examples:
reg = <0x0e000000 0x5ffff>;
nvidia,bpmp = <&bpmp>;
};
+
+ - |
+ ccplex@30000000 {
+ compatible = "nvidia,tegra264-ccplex-cluster";
+ reg = <0x30000000 0xcf0000>;
+ #performance-domain-cells = <1>;
+ nvidia,bpmp = <&bpmp>;
+ };
--
2.34.1
next prev parent reply other threads:[~2026-11-04 18:16 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-04 18:15 [PATCH 0/9] cpufreq: tegra194: add Tegra264 support Sumit Gupta
2026-11-04 18:15 ` [PATCH 1/9] cpufreq: tegra194: move MPIDR read to CPU hotplug callback Sumit Gupta
2026-11-04 18:15 ` [PATCH 2/9] cpufreq: tegra194: remove duplicate counter sampling loops Sumit Gupta
2026-11-04 18:15 ` [PATCH 3/9] cpufreq: tegra194: add tegra_counter_delta helper Sumit Gupta
2026-11-04 18:15 ` [PATCH 4/9] cpufreq: tegra194: add per-SoC counter mask Sumit Gupta
2026-11-04 18:15 ` [PATCH 5/9] cpufreq: tegra194: split MMIO mapping from ACTMON offset Sumit Gupta
2026-11-04 18:15 ` Sumit Gupta [this message]
2026-11-04 18:15 ` [PATCH 7/9] cpufreq: tegra194: derive frequency domain from device tree Sumit Gupta
2026-11-04 18:15 ` [PATCH 8/9] cpufreq: tegra194: Add support for Tegra264 Sumit Gupta
2026-11-04 18:15 ` [PATCH 9/9] arm64: tegra: Add CCPLEX cluster node " Sumit Gupta
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